The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Feb. 20, 2014
Applicant:

Shinko Electric Industries Co., Ltd., Nagano-ken, JP;

Inventors:

Sumihiro Ichikawa, Nagano, JP;

Takaharu Yamano, Nagano, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/02 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 23/3128 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06568 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15174 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate. A through hole extends through the semiconductor substrate. A first insulating layer covers an upper surface of the semiconductor substrate and includes an opening in communication with the through hole. An insulating film covers wall surfaces of the through hole and the opening. A through electrode is formed in the through hole and the opening. A first connection terminal includes an electroless plating metal layer formed on an end surface of the through electrode and an end surface of the insulating film. The first connection terminal has a larger diameter than the through electrode. A wiring pattern is laminated on a lower surface of the semiconductor substrate. An electrode pad is connected to the wiring pattern. The through electrode is connected to the wiring pattern.


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