IDiyas

For the Inventor, By the Inventor

Grenoble, France

Sylvain Maitrejean

USPTO Granted Patents = 22

 

Average Co-Inventor Count = 3.5

ph-index = 2

Forward Citations = 17(Granted Patents)


Location History:

  • Paris, FR (2016)
  • Grenoble, FR (2012 - 2023)

Company Filing History:

goldMedal14 out of 3,854 
 
Commissariat a L'energie Atomique Et Aux Energies Alternatives
 patents
silverMedal7 out of 1,013 
 
Commissariat À L'énergie Atomique Et Aux Énergies Alternatives
 patents
bronzeMedal5 out of 2,867 
 
Stmicroelectronics Gmbh
 patents
4. 2 out of 757 
 
Stmicroelectronics (crolles 2) Sas
 patents
5. 1 out of 3,559 
 
Commissariat a L'energie Atomique
 patents
where one patent can have more than one assignee

Years Active: 2012-2025

where 'Filed Patents' based on already Granted Patents

22 patents (USPTO):
1. 12198940 - Method for modifying the strain state of a block of a semiconducting material (2025-01-14),
2. 11810789 - Method of fabricating a semiconductor substrate having a stressed semiconductor region (2023-11-07),
3. 11694991 - Method for transferring chips (2023-07-04),
4. 11688811 - Transistor comprising a channel placed under shear strain and fabrication process (2023-06-27),
5. 11424121 - Method for forming a layer by cyclic epitaxy (2022-08-23),
6. 11195711 - Healing method before transfer of a semiconducting layer (2021-12-07),
7. 11081463 - Bonding method with electron-stimulated desorption (2021-08-03),
8. 10978594 - Transistor comprising a channel placed under shear strain and fabrication process (2021-04-13),
9. 10879083 - Method for modifying the strain state of a block of a semiconducting material (2020-12-29),
10. 10665497 - Method of manufacturing a structure having one or several strained semiconducting zones that may for transistor channel regions (2020-05-26),
11. 10600786 - Method for fabricating a device with a tensile-strained NMOS transistor and a uniaxial compression strained PMOS transistor (2020-03-24),
12. 9853130 - Method of modifying the strain state of a semiconducting structure with stacked transistor channels (2017-12-26),
13. 9853124 - Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacers (2017-12-26),
14. 9761607 - Method for producing strained semi-conductor blocks on the insulating layer of a semi-conductor on insulator substrate (2017-09-12),
15. 9704709 - Method for causing tensile strain in a semiconductor film (2017-07-11),

Title: The Innovative Journey of Sylvain Maitrejean

Introduction:

Sylvain Maitrejean, a visionary inventor hailing from Grenoble, France, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

Sylvain Maitrejean's latest patents include cutting-edge solutions in renewable energy storage systems and advanced medical devices, showcasing his versatility and ingenuity in various sectors.

Career Highlights:

With a career spanning over two decades, Sylvain Maitrejean has established himself as a pioneer in the tech industry, holding multiple patents that have revolutionized the way we approach everyday challenges.

Collaborations:

Throughout his career, Sylvain Maitrejean has collaborated with leading research institutions, universities, and tech companies, fostering a culture of innovation and knowledge-sharing to drive progress in the field.

Conclusion:

In conclusion, Sylvain Maitrejean's relentless pursuit of innovation and his passion for pushing the boundaries of technology have solidified his position as a respected inventor in Grenoble, France, and beyond.

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