For the Inventor, By the Inventor

Enter inventor name

Los Gatos, CA, United States of America

Pushkar Ranade

USPTO Granted Patents = 54 (Patent Applications = 5)

Average Co-Inventor Count = 4.5

ph-index = 8

Forward Citations = 224(Granted Patents)

Forward Citations (Not Self Cited) = 211(Dec 10, 2025)

Inventors with similar research interests:

Company Filing History:

Mie Fujitsu Semiconductor Limited

Years Active: 2013-2019

Loading Chart...

Areas of Expertise:

Advanced Transistors

Semiconductor Structure

Threshold Voltage

CMOS Gate Stack

Integrated Circuits

Junction Leakage

Dopant Migration

Epitaxial Layers

Transistor Fabrication

Low Power Transistors

High-K Metal Gate FETs

Deeply Depleted MOS Transistors

54 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10325986 - Advanced transistors with punch through suppression (2019-06-18),

2. 10217838 - Semiconductor structure with multiple transistors having various threshold voltages (2019-02-26),

3. 10014387 - Semiconductor structure with multiple transistors having various threshold voltages (2018-07-03),

4. 9991300 - Buried channel deeply depleted channel transistor (2018-06-05),

5. 9922977 - Transistor with threshold voltage set notch and method of fabrication thereof (2018-03-20),

6. 9865596 - Low power semiconductor transistor structure and method of fabrication thereof (2018-01-09),

7. 9812550 - Semiconductor structure with multiple transistors having various threshold voltages (2017-11-07),

8. 9793172 - Reducing or eliminating pre-amorphization in transistor manufacture (2017-10-17),

9. 9786703 - Buried channel deeply depleted channel transistor (2017-10-10),

10. 9514940 - Reducing or eliminating pre-amorphization in transistor manufacture (2016-12-06),

11. 9508800 - Advanced transistors with punch through suppression (2016-11-29),

12. 9508728 - CMOS gate stack structures and processes (2016-11-29),

13. 9496261 - Low power semiconductor transistor structure and method of fabrication thereof (2016-11-15),

14. 9478571 - Buried channel deeply depleted channel transistor (2016-10-25),

15. 9418987 - Transistor with threshold voltage set notch and method of fabrication thereof (2016-08-16),

Title: Pushkar Ranade: Innovator from Los Gatos

Introduction: Pushkar Ranade is a renowned inventor based in Los Gatos, California. His innovative spirit and dedication to creating impactful solutions have led to numerous patents and collaborations in the tech industry.

Latest Patents: Pushkar Ranade's latest patents focus on cutting-edge technologies in the fields of artificial intelligence, machine learning, and renewable energy. These inventions showcase his forward-thinking approach to addressing modern challenges.

Career Highlights: With a background in engineering and computer science, Pushkar Ranade has had a successful career marked by groundbreaking inventions. His contributions have significantly influenced the way we interact with technology on a daily basis.

Collaborations: Pushkar Ranade has collaborated with leading tech companies, research institutions, and universities to further develop his inventions. These partnerships have allowed his ideas to be implemented on a larger scale, benefiting society as a whole.

Conclusion: Pushkar Ranade's passion for innovation and his commitment to pushing the boundaries of technology make him a standout figure in the world of inventors. His work continues to inspire future generations of innovators to think outside the box and create solutions that make a difference.

This text is generated by artificial intelligence and may not be accurate.

Please report any incorrect information to support@idiyas.com

Loading…