The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2016
Filed:
Dec. 22, 2015
Mie Fujitsu Semiconductor Limited, Kuwana, JP;
Lucian Shifren, San Jose, CA (US);
Pushkar Ranade, Los Gatos, CA (US);
Paul E. Gregory, Palo Alto, CA (US);
Sachin R. Sonkusale, Los Gatos, CA (US);
Weimin Zhang, San Jose, CA (US);
Scott E. Thompson, Gainesville, FL (US);
Mie Fujitsu Semiconductor Limited, Kuwana, Mie, JP;
Abstract
An advanced transistor with punch through suppression includes a gate with length Lg, a well doped to have a first concentration of a dopant, and a screening region positioned under the gate and having a second concentration of dopant. The second concentration of dopant may be greater than 5×10dopant atoms per cm. At least one punch through suppression region is disposed under the gate between the screening region and the well. The punch through suppression region has a third concentration of a dopant intermediate between the first concentration and the second concentration of dopant. A bias voltage may be applied to the well region to adjust a threshold voltage of the transistor.