Paul E Gregory

This inventor holds 15 USPTO granted patents and 2 published patent applications. Top assignees: Mie Fujitsu Semiconductor Limited, Suvolta, Inc.. Active years: 2013-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Paul E Gregory. Retrieved from https://idiyas.com/inventor/paul-e-gregory

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15 (Patent Applications = 2)

% Patents Active = 86.7

Average Co-Inventor Count = 5.4

ph-index = 5

Forward Citations = 72(Granted Patents)

Company Filing History:

11 out of 77

Mie Fujitsu Semiconductor Limited

Years Active: 2013-2019

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15 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10325986 - Advanced transistors with punch through suppression (2019-06-18),

2. 10217838 - Semiconductor structure with multiple transistors having various threshold voltages (2019-02-26),

3. 10014387 - Semiconductor structure with multiple transistors having various threshold voltages (2018-07-03),

4. 9812550 - Semiconductor structure with multiple transistors having various threshold voltages (2017-11-07),

5. 9508800 - Advanced transistors with punch through suppression (2016-11-29),

6. 9391076 - CMOS structures and processes based on selective thinning (2016-07-12),

7. 9299698 - Semiconductor structure with multiple transistors having various threshold voltages (2016-03-29),

8. 9263523 - Advanced transistors with punch through suppression (2016-02-16),

9. 9111785 - Semiconductor structure with improved channel stack and method for fabrication thereof (2015-08-18),

10. 9093469 - Analog transistor (2015-07-28),

11. 9041126 - Deeply depleted MOS transistors having a screening layer and methods thereof (2015-05-26),

12. 8748270 - Process for manufacturing an improved analog transistor (2014-06-10),

13. 8614128 - CMOS structures and processes based on selective thinning (2013-12-24),

14. 8525271 - Semiconductor structure with improved channel stack and method for fabrication thereof (2013-09-03),

15. 8421162 - Advanced transistors with punch through suppression (2013-04-16),

Title: The Innovative Journey of Paul E Gregory

Introduction: Paul E Gregory, a distinguished inventor based in Palo Alto, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Paul E Gregory's latest patents include a cutting-edge software application for data encryption and a revolutionary device for enhancing solar energy efficiency.

Career Highlights: With over two decades of experience in the tech industry, Paul E Gregory has a proven track record of developing innovative solutions that have garnered international acclaim. His work has been instrumental in shaping the future of cybersecurity and renewable energy technologies.

Collaborations: Throughout his career, Paul E Gregory has collaborated with leading research institutions and tech companies to push the boundaries of innovation. His ability to work across disciplines and bring diverse teams together has been key to his success.

Conclusion: Paul E Gregory's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors. His impact on the tech industry is truly remarkable, and his legacy will undoubtedly endure for years to come.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: