For the Inventor, By the Inventor

Enter assignee name

Los Gatos, CA, United States of America

Suvolta, Inc.

USPTO Granted Patents = 88

% Expired Patents = 40.9

Forward Citations = 461

Loading Chart...

Loading Chart...

63 inventors (with patents filed for the assignee):

Pushkar Ranade (25 out of 54 patents)

Scott E Thompson (23 out of 58 patents)

Lucian Shifren (21 out of 112 patents)

4. Lawrence T Clark (13 out of 128 patents)

5. Damodar Reddy Thummalapally (13 out of 28 patents)

6. Ashok K Kapoor (13 out of 124 patents)

7. Dalong Zhao (8 out of 25 patents)

8. Lance A Scudder (7 out of 43 patents)

9. Thomas Hoffmann (7 out of 32 patents)

10. Sachin R Sonkusale (7 out of 16 patents)

11. Richard Stephen Roy (7 out of 61 patents)

12. Madhukar B Vora (6 out of 61 patents)

13. Samuel Leshner (4 out of 16 patents)

14. Paul E Gregory (4 out of 15 patents)

15. Charles Stager (4 out of 7 patents)

Core Competencies:

Advanced Transistors

SRAM Structures

Junction Field Effect Transistors

Body Bias Circuits

Integrated Circuits

Low Power Transistors

Analog Circuits

Memory Circuits

Channel Doping

Transistor Fabrication

CMOS Structures

Thin Film Layers

88 patents: Sort by Forward Citations

1. 9006843 - Source/drain extension control for advanced transistors (2015-04-14),

2. 8999861 - Semiconductor structure with substitutional boron and method for fabrication thereof (2015-04-07),

3. 8995204 - Circuit devices and methods having adjustable transistor body bias (2015-03-31),

4. 8994415 - Multiple VDD clock buffer (2015-03-31),

5. 8988153 - Ring oscillator with NMOS or PMOS variation insensitivity (2015-03-24),

6. 8976575 - SRAM performance monitor (2015-03-10),

7. 8975128 - Electronic devices and systems, and methods for making and using the same (2015-03-10),

8. 8970289 - Circuits and devices for generating bi-directional body bias voltages, and methods therefor (2015-03-03),

9. 8963249 - Electronic device with controlled threshold voltage (2015-02-24),

10. 8937005 - Reducing or eliminating pre-amorphization in transistor manufacture (2015-01-20),

11. 8916937 - Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer (2014-12-23),

12. 8895327 - Tipless transistors, short-tip transistors, and methods and circuits therefor (2014-11-25),

13. 8883600 - Transistor having reduced junction leakage and methods of forming thereof (2014-11-11),

14. 8877619 - Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom (2014-11-04),

15. 8863064 - SRAM cell layout structure and devices therefrom (2014-10-14),

Company Overview

Suvolta, Inc., based in Los Gatos, California, specializes in semiconductor technology, focusing on the development of advanced transistors and integrated circuits. The company is recognized for its innovative work in low power transistors, SRAM structures, and junction field effect transistors, which enhance the performance and efficiency of electronic devices. Suvolta's expertise extends to body bias circuits and analog memory circuits, positioning it as a key player in the semiconductor industry, dedicated to advancing power-efficient solutions.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

88 Patents

#5 in Los Gatos, CA

#985 in California

#4,239 in US

#8,685 in the World

Los Gatos, CA, United States of America

Suvolta, Inc.

Forward Citations = 461

63 inventors:

Pushkar Ranade (25 out of 54 patents)

Scott E Thompson (23 out of 58 patents)

Lucian Shifren (21 out of 112 patents)

4. Lawrence T Clark (13 out of 128 patents)

5. Damodar Reddy Thummalapally (13 out of 28 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Suvolta, Inc.. Retrieved from https://idiyas.com/company/suvolta

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

Loading…