The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Jan. 23, 2013
Applicant:

Suvolta, Inc., Los Gatos, CA (US);

Inventors:

Scott E. Thompson, Gainesville, FL (US);

Lucian Shifren, San Jose, CA (US);

Pushkar Ranade, Los Gatos, CA (US);

Lance Scudder, Sunnyvale, CA (US);

Dalong Zhao, San Jose, CA (US);

Teymur Bakhisher, San Jose, CA (US);

Sameer Pradhan, San Jose, CA (US);

Assignee:

SuVolta, Inc., Los Gatos, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/425 (2006.01); H01L 21/336 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823412 (2013.01);
Abstract

Structures and processes are provided that can be used for effectively integrating different transistor designs across a process platform. In particular, a bifurcated process is provided in which dopants and other processes for forming some transistor types may be performed prior to STI or other device isolation processes, and other devices may be formed thereafter. Thus, doping and other steps and their sequence with respect to the STI process can be selected to be STI-first or STI-last, depending on the device type to be manufactured, the range of device types that are manufactured on the same wafer or die, or the range of device types that are planned to be manufactured using the same or similar mask sets.


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