The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2015

Filed:

Aug. 29, 2013
Applicant:

Suvolta, Inc., Los Gatos, CA (US);

Inventors:

David A. Kidd, San Jose, CA (US);

Chao-Wu Chen, San Jose, CA (US);

Vineet Agrawal, San Jose, CA (US);

Assignee:

SuVolta, Inc., Los Gatos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/419 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 7/22 (2013.01);
Abstract

A semiconductor circuit can include an array of static random access memory (SRAM) cells. A first SRAM cell may provide a first current through an insulated gate field effect transistor (IGFET) having a first conductivity type. A second SRAM cell may provide a second current through an IGFET having a second conductivity type. A first current division slew circuit can provide a first slew output current proportional to the first current to change the charge on a first slew capacitor. A second current division slew circuit can provide a second slew output current proportional to the second current to change the charge on a second slew capacitor. A pulse may be generated having a first edge determined by a launch signal and a second edge determined by the time the first or the second capacitor reach a predetermined potential.


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