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For the Inventor, By the Inventor

Hsinchu, Taiwan

Ming-Chih Yew

This inventor holds 124 USPTO granted patents and 81 published patent applications, primarily in Semiconductor Packaging (CPC class H01L24-16). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Taiwan Semiconductor Manufacturing Co., Ltd., Advanced Chip Engineering Technologies Inc.. Active years: 2011-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ming-Chih Yew. Retrieved from https://idiyas.com/inventor/ming-chih-yew

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 124 

% Patents Active = 96.0

Average Co-Inventor Count = 5.2

ph-index = 8

Forward Citations = 281(Granted Patents)

Forward Citations (Not Self Cited) = 197(Dec 10, 2025)


Inventors with similar research interests:

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Company Filing History:

goldMedal121 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal2 out of 481 
 
Taiwan Semiconductor Manufacturing Co., Ltd.
 patents
bronzeMedal1 out of 1 
 
Advanced Chip Engineering Technologies Inc.
 patent

Years Active: 2011-2026

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Areas of Expertise:
Thermal Interface Material
Stress Buffers
Underfill Technologies
Integrated Circuit Package
Fan-Out Package
Delamination Reduction
Conductive Patterns
Multi-Lid Structures
Dummy Dies
C4 Bonding
Stress Release Structure
Chip Package Structure
124 patents (USPTO):Explore Patents
1. 12757759 - Method of manufacturing semiconductor packages (2026-10-06),
2. 12751307 - Semiconductor package (2026-09-29),
3. 12740448 - Deformation-resistant interposer for a local silicon interconnect and methods for forming the same (2026-09-15),
4. 12708050 - Fabricating method of semiconductor die with tapered sidewall in package (2026-08-11),
5. 12648478 - Package structure and method for forming the same (2026-06-02),
6. 12642144 - Multi-bump connection to interconnect structure and manufacturing method thereof (2026-05-26),
7. 12568824 - Package assembly including liquid alloy thermal interface material (TIM) and seal ring around the liquid alloy TIM and methods of forming the same (2026-03-03),
8. 12557645 - Semiconductor packages with thermal lid and methods of forming the same (2026-02-17),
9. 12550792 - Semiconductor package and method of manufacturing the same (2026-02-10),
10. 12519067 - Two-piece type stiffener structure with beveled surface for delamination reduction and methods for forming the same (2026-01-06),
11. 12512399 - Semiconductor package and method of manufacture (2025-12-30),
12. 12506090 - Semiconductor package including stress buffers and methods of forming the same (2025-12-23),
13. 12500208 - Integrated fan-out package having stress release structure (2025-12-16),
14. 12482780 - Chip package structure including an underfill material portion comprising a cut region (2025-11-25),
15. 12476223 - Semiconductor package and method of manufacturing the same (2025-11-18),

Title: The Innovative Journey of Ming-Chih Yew

Introduction: Ming-Chih Yew, a distinguished inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Ming-Chih Yew holds several patents in the areas of semiconductor technology, renewable energy, and artificial intelligence, showcasing his versatility and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Ming-Chih Yew has worked with leading tech companies and research institutions, spearheading projects that have revolutionized various industries.

Collaborations: Ming-Chih Yew has collaborated with top researchers, engineers, and scientists from around the world, fostering a culture of innovation and knowledge exchange to drive progress in the field of technology.

Conclusion: Ming-Chih Yew's passion for innovation, coupled with his relentless pursuit of excellence, continues to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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