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For the Inventor, By the Inventor

Tokyo, Japan

Kazushige Takaishi

This inventor holds 25 USPTO granted patents and 4 published patent applications and 9 EPO patents, primarily in Silicon Wafer Processing. Top assignees: Sumco Corporation, Sumitomo Mitsubishi Silicon Corporation, Mitsubishi Materials Corporation. Active years: 2000-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazushige Takaishi. Retrieved from https://idiyas.com/inventor/kazushige-takaishi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 25 

% Patents Active = 68.0

 

Average Co-Inventor Count = 3.3

ph-index = 3

Forward Citations = 62(Granted Patents)


Location History:

  • Tokyo, JP (2000 - 2014)
  • Minato-ku, JP (2015)

Company Filing History:

goldMedal20 out of 626 
 
Sumco Corporation
 patents
silverMedal2 out of 90 
 
Sumitomo Mitsubishi Silicon Corporation
 patents
bronzeMedal1 out of 1,556 
 
Mitsubishi Materials Corporation
 patents
4. 1 out of 51 
 
Mitsubishi Materials Silicon Corporation
 patents
5. 1 out of 1 
 
Sumico Corporation
 patent
6. 1 out of 834,601 
Other
 patents
where one patent can have more than one assignee

Years Active: 2000-2025

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Areas of Expertise:
Epitaxial Wafer
Silicon Wafer
Wafer Polishing
Wafer Etching
Surface Roughness
Single-Wafer Process
Cleaning Apparatus
Manufacturing Method
Alkaline Etchant
Polishing Apparatus
Wafer Surface Smoothing
25 patents (USPTO):Explore Patents
1. 12311496 - Method of double-side polishing work, method of producing work, and double-side polishing apparatus for a work (2025-05-27),
2. 9190267 - Epitaxial silicon wafer and production method thereof (2015-11-17),
3. 8900033 - Wafer polishing method (2014-12-02),
4. 8759229 - Method for manufacturing epitaxial wafer (2014-06-24),
5. 8728942 - Method for producing epitaxial silicon wafer (2014-05-20),
6. 8466071 - Method for etching single wafer (2013-06-18),
7. 8147295 - Method of polishing silicon wafer (2012-04-03),
8. 8080106 - Epitaxial silicon wafer and production method thereof (2011-12-20),
9. 8066896 - Apparatus for etching wafer by single-wafer process and single wafer type method for etching wafer (2011-11-29),
10. 7998867 - Method for manufacturing epitaxial wafer (2011-08-16),
11. 7955982 - Method for smoothing wafer surface and apparatus used therefor (2011-06-07),
12. 7955440 - Method for cleaning silicon wafer and apparatus for cleaning the silicon wafer (2011-06-07),
13. 7906438 - Single wafer etching method (2011-03-15),
14. 7851375 - Alkaline etchant for controlling surface roughness of semiconductor wafer (2010-12-14),
15. 7717768 - Wafer polishing apparatus and method for polishing wafers (2010-05-18),

Title: **Kazushige Takaishi: Innovator in Silicon Wafer Technology**

Introduction

Kazushige Takaishi, based in Tokyo, Japan, is a renowned inventor with a significant portfolio consisting of 24 patents. His contributions to the field of silicon wafer technology have advanced the production and processing methods vital to the semiconductor industry.

Latest Patents

Takaishi's recent innovations include a patent for an epitaxial silicon wafer and its production method. This invention provides an improved cross-sectional form for silicon wafers used in epitaxial growth, reducing warping compared to conventional designs. Another notable patent highlights a wafer polishing method that minimizes undesirable sounds during the process and reduces thickness variations post-polishing. This method effectively employs polishing pads with circular holes for retaining the wafers, enhancing efficiency and precision in wafer production.

Career Highlights

Throughout his career, Takaishi has been associated with leading companies in the semiconductor field, including Sumco Corporation and Sumitomo Mitsubishi Silicon Corporation. His work in these prestigious organizations has contributed to innovative advancements in silicon wafer technologies.

Collaborations

Takaishi has collaborated with prominent professionals in the industry, including Sakae Koyata and Takeo Katoh. Their combined expertise has fostered significant developments in the field, pushing the boundaries of what is achievable in semiconductor manufacturing.

Conclusion

Kazushige Takaishi stands out as a pivotal figure in the semiconductor innovation landscape. His patents not only address critical challenges within the industry but also pave the way for future advancements in silicon wafer technology. His contributions are indicative of a broader commitment to excellence in research and innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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