Sunnyvale, CA, United States of America

Jean Yee-Mei Yang

This inventor holds 24 USPTO granted patents and 1 published patent application and 2 EPO patents, primarily in Memory Device Technology. Top assignees: Advanced Micro Devices Corporation, Spansion LLC., Fasl LLC. Active years: 2002-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jean Yee-Mei Yang. Retrieved from https://idiyas.com/inventor/jean-yee-mei-yang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24 

% Patents Active = 95.8


Average Co-Inventor Count = 3.9

ph-index = 10

Forward Citations = 414(Granted Patents)


Location History:

  • Sunnyvale, CA (US) (2002 - 2007)
  • Glendale, CA (US) (2009 - 2016)

Company Filing History:


Years Active: 2002-2016

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Areas of Expertise:
Dielectric Extension
Charge Protection
Memory Device
Silicided Bitlines
NROM Devices
SONOS Flash Memory
Tunable Interlayer Dielectric
Bitline Implant
Memory Structure
Gate Stack Spacer
Alignment Marks
Charge Loss Reduction
24 patents (USPTO):Explore Patents

Title: Innovations and Contributions of Jean Yee-Mei Yang

Introduction: Jean Yee-Mei Yang, based in Sunnyvale, California, is a prominent inventor known for his significant contributions to the field of semiconductor technology. With an impressive portfolio of 24 patents, Yang has demonstrated a commitment to innovation that has advanced the capabilities of modern electronic devices.

Latest Patents: Jean Yee-Mei Yang's latest patents showcase his expertise in mitigating challenges in transistor design. One of his key inventions, titled "Dielectric extension to mitigate short channel effects," involves a novel approach where some layers of gate dielectric material are retained during the transistor patterning process. This innovation helps retard the implantation of dopants, effectively lengthening the channel region and reducing undesirable short channel effects, such as leakage currents, enhancing the transistor's overall performance. Another significant patent, "Memory device protection layer," details a memory device architecture that incorporates a protection layer on the surfaces of source and drain regions in a group of memory cells, improving the reliability and functionality of memory devices.

Career Highlights: Throughout his career, Jean Yee-Mei Yang has worked with leading technology companies, including Advanced Micro Devices Corporation (AMD) and Spansion LLC. His contributions in these roles have played a crucial part in developing semiconductor technologies that are foundational to contemporary electronics.

Collaborations: Yang's work has often involved collaborations with esteemed colleagues such as Yider Wu and Mark T Ramsbey. These partnerships have fostered an environment of shared innovation, leading to advancements that benefit the industry as a whole.

Conclusion: Jean Yee-Mei Yang's innovative spirit and dedication to improving semiconductor technology have earned him recognition in the field. With his 24 patents, he continues to shape the future of electronics, ensuring that devices are more efficient and reliable for consumers and industries alike. His ongoing contributions exemplify the impact of skilled inventors on technological progress.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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