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For the Inventor, By the Inventor

Hsinchu, Taiwan

Hong-Chen Cheng

This inventor holds 49 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Devices. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., TSMC Nanjing Company, Limited. Active years: 2009-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hong-Chen Cheng. Retrieved from https://idiyas.com/inventor/hong-chen-cheng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 49 

% Patents Active = 67.3

Average Co-Inventor Count = 4.6

ph-index = 4

Forward Citations = 86(Granted Patents)


Company Filing History:

goldMedal49 out of 42,926 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal3 out of 115 
 
TSMC Nanjing Company, Limited
 patents
where one patent can have more than one assignee

Years Active: 2009-2025

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Areas of Expertise:
Through-Silicon Via
Memory Macro
Inter-Layer Via
Semiconductor Device
Voltage Providing Circuit
Sense Amplifier
Memory Read Techniques
Dual Rail SRAM
Cell Design
Tracking Signals
Modified Design Rules
Resistive Memory
49 patents (USPTO):Explore Patents
1. 12308303 - Integrated circuit die with memory macro including through-silicon via and method of forming the same (2025-05-20),
2. 11854943 - Memory macro including through-silicon via (2023-12-26),
3. 11723195 - Semiconductor device having an inter-layer via (ILV), and method of making same (2023-08-08),
4. 11562946 - Memory macro including through-silicon via (2023-01-24),
5. 11138359 - Method of fabricating a semiconductor device (2021-10-05),
6. 11024634 - Semiconductor device having an inter-layer via (ILV), and method of making same (2021-06-01),
7. 10866281 - System and method to diagnose integrated circuit (2020-12-15),
8. 10762269 - Method of fabricating a semiconductor device (2020-09-01),
9. 10339248 - Modified design rules to improve device performance (2019-07-02),
10. 10267853 - System and method to diagnose integrated circuit (2019-04-23),
11. 10170487 - Device having an inter-layer via (ILV), and method of making same (2019-01-01),
12. 10049706 - Memory and method of operating the same (2018-08-14),
13. 10001801 - Voltage providing circuit (2018-06-19),
14. 9852249 - Modified design rules to improve device performance (2017-12-26),
15. 9685226 - Tracking signals in memory write or read operation (2017-06-20),

Title: Hong-Chen Cheng: A Trailblazer in Innovation

Introduction:

Hong-Chen Cheng, based in Hsinchu, Taiwan, is a visionary inventor who has etched his name in the annals of innovation with his dedication to progress and his commitment to shaping a brighter tomorrow through his inventive designs.

Latest Patents:

Among his 48 patents, two of his latest innovations include a cutting-edge memory macro featuring through-silicon via technology, revolutionizing integrated circuits by enhancing connectivity and power distribution. Additionally, his semiconductor device boasting an inter-layer via showcases his prowess in semiconductor technology, offering efficient memory device connectivity through intricate design.

Career Highlights:

Having worked with giants like Taiwan Semiconductor Manufacturing Company Ltd. and TSMC Nanjing Company Limited, Hong-Chen Cheng has honed his skills and expertise in the semiconductor industry, contributing significantly to technological advancements and breakthroughs in the field.

Collaborations:

Throughout his career, Hong-Chen Cheng has collaborated with industry experts and innovators like Cheng Hung Lee and Hung-Jen Liao, leveraging collective knowledge and experience to drive innovation and push the boundaries of what is possible in the realm of semiconductors.

Conclusion:

In conclusion, Hong-Chen Cheng stands as a beacon of inspiration in the world of innovation, embodying the spirit of relentless pursuit and unwavering passion for crafting a better future through his inventive creations. His contributions to the field of semiconductor technology are testament to his ingenuity and dedication, leaving an indelible mark on the landscape of innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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