The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2017
Filed:
Jul. 24, 2013
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Annie Lum, San Jose, CA (US);
Derek C. Tao, Fremont, CA (US);
Cheng Hung Lee, Hsinchu, TW;
Chung-Ji Lu, Fongyuan, TW;
Hong-Chen Cheng, Hsinchu, TW;
Vineet Kumar Agrawal, Santa Clara, CA (US);
Keun-Young Kim, Campbell, CA (US);
Pyong Yun Cho, Fremont, CA (US);
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method of designing a layout of devices includes designing a layout of gate structures and diffusion regions of a plurality of devices. The method further includes identifying an edge device of the plurality of devices. The method further includes adding a dummy device next to the edge device and a dummy gate structure next to the dummy device, wherein the dummy device shares a diffusion region with the edge device, and wherein a gate structure of the dummy device is considered to be one of two dummy gate structures added next to the edge device.