The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Dec. 20, 2017
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Annie Lum, San Jose, CA (US);
Derek C. Tao, Fremont, CA (US);
Cheng Hung Lee, Hsinchu, TW;
Chung-Ji Lu, Fongyuan, TW;
Hong-Chen Cheng, Hsinchu, TW;
Vineet Kumar Agrawal, Santa Clara, CA (US);
Keun-Young Kim, Campbell, CA (US);
Pyong Yun Cho, Fremont, CA (US);
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method includes designing a layout of gate structures and diffusion regions of a plurality of devices, identifying an edge device of the plurality of devices, adding a dummy device next to the edge device and a dummy gate structure next to the dummy device resulting in a modified layout, and fabricating, based on the modified layout, at least one of a photolithography mask or at least one component in a layer of a semiconductor device. The dummy device shares a diffusion region with the edge device. A gate structure of the dummy device is one of two dummy gate structures added next to the edge device.