Chandler, AZ, United States of America

Gang Duan

This inventor holds 73 USPTO granted patents and 295 published patent applications and 6 EPO patents, primarily in Microelectronics Packaging. Top assignees: Intel Corporation, California Institute of Technology. Active years: 2010-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gang Duan. Retrieved from https://idiyas.com/inventor/gang-duan-8ors5lfn

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 73 

% Patents Active = 75.3

 

Average Co-Inventor Count = 5.4

ph-index = 3

Forward Citations = 39(Granted Patents)


Company Filing History:


Years Active: 2010-2026

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Areas of Expertise:
Die Attach Materials
Microelectronic Assemblies
Interconnect Architectures
Warpage Reduction
Optical Interconnection
Hybrid Fan-Out
Chiplet Architecture
Magnetic Core Inductors
Fiducial Marker Detection
Thin Film Capacitors
Conductive Route Patterning
Dielectric Material Optimization
73 patents (USPTO):Explore Patents

Title: Gang Duan: Semiconductor Packaging and Photonic Integration Inventor.

Introduction

Gang Duan is an inventor based in Chandler, Arizona, whose work includes semiconductor packaging and integrated photonic technologies. His portfolio includes 73 patents, reflecting contributions to chip bonding, alignment control, and electro-optical circuit design.

Latest Patents

“Method for Panel-Level Thermo-Compression Bonding” describes a bonding tool with a heated compression head, a stage, a sensor, and a controller. The method uses a recipe-defined displacement and temperature profile alongside measured offsets to control chip gap height and alignment during bonding.

“Electro-Optical Circuits with Modular Switchable Photonic Interface” describes an integrated circuit module combining photonic and electrical ICs with a switchable waveguide device. Controlled by a signal from the electrical IC, the device manages optical signals to or from the photonic IC. The design may use nonlinear optical material and metallization structures, with the ICs hybrid bonded or soldered together and coupled to a system substrate.

Career Highlights

Duan’s listed professional affiliations include Intel Corporation and the California Institute of Technology. His patent work spans advanced bonding processes and modular interfaces for photonic and electrical components.

Collaborations

Duan’s listed coworkers include Srinivas V. Pietambaram and Rahul N. Manepalli. Their names appear among the professional connections associated with his work.

Conclusion

Gang Duan’s patent portfolio highlights innovations in semiconductor assembly and photonic integration, with a focus on precise bonding control and adaptable electro-optical circuit interfaces.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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