The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Dec. 29, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Gang Duan, Chandler, AZ (US);

Srinivas Pietambaram, Chandler, AZ (US);

Brandon Marin, Gilbert, AZ (US);

Suddhasattwa Nad, Chandler, AZ (US);

Jeremy Ecton, Gilbert, AZ (US);

Yang Wu, Chandler, AZ (US);

Minglu Liu, Chandler, AZ (US);

Yosuke Kanaoka, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 40/22 (2026.01); H10W 20/20 (2026.01); H10W 40/70 (2026.01); H10W 70/65 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 72/30 (2026.01); H10W 74/15 (2026.01);
U.S. Cl.
CPC ...
H10W 40/22 (2026.01); H10W 20/20 (2026.01); H10W 40/70 (2026.01); H10W 70/65 (2026.01); H10W 74/019 (2026.01); H10W 74/111 (2026.01); H10W 90/00 (2026.01); H10W 72/07354 (2026.01); H10W 72/347 (2026.01); H10W 72/877 (2026.01); H10W 74/15 (2026.01); H10W 90/724 (2026.01); H10W 90/734 (2026.01);
Abstract

Microelectronic integrated circuit package structures include a first die and a second die both coupled to a bridge structure at an interface. A first thermally conductive mold material is on a first side of the interface and surrounds the first die and the second die. A second mold material is on a second, opposing side of the interface and surrounds the bridge structure.


Find Patent Forward Citations

Quick Actions:

Duan, Gang. (2026). Package architectures with heterogeneous integration of various device thicknesses (U.S. Patent No. 12787762). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787762

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