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Chung-Wei Hsu

This inventor holds 90 USPTO granted patents and 49 published patent applications, primarily in Semiconductor Devices (CPC class H01L29-42392). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Taiwan Semiconductor Manufacturing Co., Ltd., Wistron Neweb Corporation. Active years: 2013-2026.

USPTO Granted Patents = 90 (Patent Applications = 49)

% Patents Active = 100.0

Average Co-Inventor Count = 6.3

ph-index = 4

Forward Citations = 97(Granted Patents)

Forward Citations (Not Self Cited) = 45(Dec 10, 2025)

Inventors with similar research interests:

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Location History:

Taipei Hsien, TW (2013)
Hsinchu County, TW (2019 - 2024)
Hsinchu, TW (2021 - 2024)

Company Filing History:

85 out of 42,759

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

3 out of 463

Taiwan Semiconductor Manufacturing Co., Ltd.

patents

2 out of 786

Wistron Neweb Corporation

patents

Years Active: 2013-2026

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Areas of Expertise:

Transistor

Nanosheet

Integrated Circuit

Fabrication

Field Effect

Gate Electrode

Silicon Channel

Isolation Layer

Cobalt-Based Interconnects

Self-Aligned Contacts

Dipole Incorporation

Multi-Gate Devices

90 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12745454 - Single metal gate with dual effective work function gate metal scheme (2026-09-22),

2. 12740103 - Semiconductor device having nanosheet transistor and improved dipole layer (2026-09-15),

3. 12690258 - Dipole patterning for CMOS devices (2026-07-21),

4. 12575133 - Transistor device with work function metal layers and method thereof (2026-03-10),

5. 12528154 - Method for conditioning polishing pad (2026-01-20),

6. 12507474 - Input/output semiconductor devices (2025-12-23),

7. 12477766 - Semiconductor transistor device structure including nanostructure and gate structure with protection layer and fill layer and method for forming the same (2025-11-18),

8. 12419073 - Device having a gate electrode wrapping around semiconductor layers and proximate to a dielectric fin (2025-09-16),

9. 12396248 - Semiconductor device fabrication methods and structures thereof (2025-08-19),

10. 12389675 - Semiconductor device having nanosheet transistor and methods of fabrication thereof (2025-08-12),

11. 12362281 - Partial barrier free vias for cobalt-based interconnects and methods of fabrication thereof (2025-07-15),

12. 12324219 - Integrated circuit including dipole incorporation for threshold voltage tuning in transistors (2025-06-03),

13. 12315731 - Integrated circuit with nanosheet transistors with metal gate passivation (2025-05-27),

14. 12237418 - Liner for a bi-layer gate helmet and the fabrication thereof (2025-02-25),

15. 12237396 - P-metal gate first gate replacement process for multigate devices (2025-02-25),

Title: The Innovative Journey of Inventor Chung-Wei Hsu

Introduction: Chung-Wei Hsu, a talented inventor hailing from Hsinchu County, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: Chung-Wei Hsu holds several patents in the areas of semiconductor technology and renewable energy solutions, showcasing his versatility and forward-thinking approach to invention.

Career Highlights: With a background in engineering and a passion for problem-solving, Chung-Wei Hsu has led successful projects that have revolutionized the way we approach sustainability and efficiency in various industries.

Collaborations: Throughout his career, Chung-Wei Hsu has collaborated with leading research institutions and technology companies to bring his inventions to life, fostering a culture of innovation and progress.

Conclusion: Chung-Wei Hsu's dedication to pushing the boundaries of what is possible through his inventions has solidified his reputation as a visionary inventor, inspiring the next generation of innovators to dream big and create change.

Profile summary based on public USPTO records.

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