The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2025
Filed:
Jul. 27, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Lung-Kun Chu, New Taipei, TW;
Mao-Lin Huang, Hsinchu, TW;
Chung-Wei Hsu, Hsinchu County, TW;
Jia-Ni Yu, New Taipei, TW;
Kuo-Cheng Chiang, Hsinchu County, TW;
Chih-Hao Wang, Hsinchu County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A device according to the present disclosure includes a fin structure disposed on a substrate and including a stack of semiconductor layers that are separated from each other, a dielectric fin disposed on the substrate, a spacer layer disposed on a sidewall of the dielectric fin and extending below the dielectric fin such that the spacer layer prevents the dielectric fin from interfacing with the substrate, an interfacial layer wrapping around each semiconductor layer of the stack, a gate dielectric layer disposed on the interfacial layer wrapping around each semiconductor layer of the stack, and a gate electrode layer including a first portion wrapping around the gate dielectric layer disposed on the interfacial layer and a second portion extending along the spacer layer disposed on the dielectric fin. An airgap extends between the first portion of the gate electrode layer and the second portion of the gate electrode layer.