The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2026

Filed:

Jul. 18, 2023
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chung-Wei Hsu, Hsinchu, TW;

Lung-Kun Chu, Hsinchu, TW;

Jia-Ni Yu, Hsinchu, TW;

Chun-Fu Lu, Hsinchu, TW;

Kuo-Cheng Chiang, Hsinchu, TW;

Chih-Hao Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); H01L 29/786 (2006.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 84/85 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 84/0167 (2025.01); H10D 84/038 (2025.01);
Abstract

An integrated circuit includes an NMOS gate all around (GAA) transistor and a PMOS GAA transistor. A single gate metal is utilized for both transistors. An effective work function is imparted to the NMOS transistor by including a first layer of the gate metal around the channels, a semiconductor layer around the first layer of the gate metal, and a gate fill layer of the gate metal on the semiconductor layer. In the PMOS transistor, the gate fill layer of the gate metal is on the gate dielectric without an intervening semiconductor layer.


Find Patent Forward Citations

Loading…