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For the Inventor, By the Inventor

Portland, OR, United States of America

Chia-Ching Lin

This inventor holds 73 USPTO granted patents and 133 published patent applications and 5 EPO patents, primarily in Transistor Technologies. Top assignees: Intel Corporation, Cornell University, Intel Coporation. Active years: 2019-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chia-Ching Lin. Retrieved from https://idiyas.com/inventor/chia-ching-lin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 73 

% Patents Active = 93.2

 

Average Co-Inventor Count = 7.3

ph-index = 3

Forward Citations = 58(Granted Patents)

Forward Citations (Not Self Cited) = 41(Dec 10, 2025)


Location History:

  • West Lafayette, IN (US) (2019 - 2021)
  • Portland, OR (US) (2020 - 2024)

Company Filing History:

goldMedal70 out of 56,290 
 
Intel Corporation
 patents
silverMedal1 out of 2,949 
 
Cornell University
 patents
bronzeMedal1 out of 1 
 
Intel Coporation
 patent
where one patent can have more than one assignee

Years Active: 2019-2026

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Areas of Expertise:
Transistor
Ferroelectric Gate Dielectric
Magnetoelectric Logic
High-k Oxide
2D Materials
Memory Cells
Capacitor
Spin-Orbit Coupling
Probabilistic Computing
Nano-Rod
Electrically Conductive Layer
TMD Integration
73 patents (USPTO):Explore Patents
1. 12745403 - Ferroelectric oxide- and ferroelectric monochalcogenide-based capacitors (2026-09-22),
2. 12733197 - Back-end-of-line 2D transistor (2026-09-08),
3. 12696501 - Seeded growth for 2D nanoribbon transistors (2026-07-28),
4. 12660272 - Selective gate oxide formation on 2D material based transistor devices (2026-06-16),
5. 12641804 - Capacitor devices with strontium titanate insulator layers (2026-05-26),
6. 12616021 - Metal insulator metal (MIM) capacitor architectures (2026-04-28),
7. 12615967 - Magnetoelectric logic with magnetic tunnel junctions (2026-04-28),
8. 12615807 - Technologies for transistors with a ferroelectric gate dielectric (2026-04-28),
9. 12610584 - Selective growth of high-k oxide on channel of gate-all-around transistors (2026-04-21),
10. 12588257 - 2D layered gate oxide (2026-03-24),
11. 12588252 - Fin trim plug structures with metal for imparting channel stress (2026-03-24),
12. 12575165 - Transistor devices with high-k perovskite gate dielectrics (2026-03-10),
13. 12575111 - Back-end-of-line 2D memory cell (2026-03-10),
14. 12568658 - Technologies for majority gates (2026-03-03),
15. 12513911 - Ferroelectrically modulated spin orbit logic device (2025-12-30),

Title: The Innovative Journey of Chia-Ching Lin

Introduction: Chia-Ching Lin, a pioneering inventor based in Portland, Oregon, has made significant contributions to the field of technology with her groundbreaking innovations.

Latest Patents: Chia-Ching Lin's recent patents include advancements in renewable energy technology, sustainable materials, and artificial intelligence systems, showcasing her versatility and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Chia-Ching Lin has established herself as a leading figure in the tech industry, holding multiple patents and receiving recognition for her innovative solutions to complex challenges.

Collaborations: Throughout her career, Chia-Ching Lin has collaborated with top research institutions, leading companies, and talented individuals to bring her ideas to life and push the boundaries of technological innovation.

Conclusion: Chia-Ching Lin's passion for innovation, coupled with her dedication to creating a positive impact on society, continues to drive her forward as she works towards shaping a more sustainable and technologically advanced future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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