The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2026

Filed:

Sep. 24, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ashish Verma Penumatcha, Beaverton, OR (US);

Sarah Atanasov, Beaverton, OR (US);

Seung Hoon Sung, Portland, OR (US);

Rahul Ramamurthy, Hillsboro, OR (US);

I-Cheng Tung, Hillsboro, OR (US);

Uygar E. Avci, Portland, OR (US);

Matthew V. Metz, Portland, OR (US);

Jack T. Kavalieros, Portland, OR (US);

Chia-Ching Lin, Portland, OR (US);

Kaan Oguz, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/67 (2025.01); H10D 30/01 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6735 (2025.01); H10D 30/031 (2025.01); H10D 64/01 (2025.01); H10D 64/021 (2025.01);
Abstract

Embodiments disclosed herein include transistor devices and methods of forming such devices. In an embodiment, a transistor device comprises a first channel, wherein the first channel comprises a semiconductor material and a second channel above the first channel, wherein the second channel comprises the semiconductor material. In an embodiment, a first spacer is between the first channel and the second channel, and a second spacer is between the first channel and the second channel. In an embodiment, a first gate dielectric is over a surface of the first channel that faces the second channel, and a second gate dielectric is over a surface of the second channel that faces the first channel. In an embodiment, the first gate dielectric is physically separated from the second gate dielectric.


Find Patent Forward Citations

Penumatcha, Ashish. (2026). Selective growth of high-k oxide on channel of gate-all-around transistors (U.S. Patent No. 12610584). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12610584

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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