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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12575165 B1

PDFFull Text
Date of Patent:
Mar. 10, 2026

Filed:

Feb. 08, 2022

Transistor devices with high-k perovskite gate dielectrics

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Arnab Sen Gupta, Beaverton, OR (US);

Abhishek A. Sharma, Hillsboro, OR (US);

Matthew V. Metz, Portland, OR (US);

Kaan Oguz, Portland, OR (US);

Urusa Shahriar Alaan, Hillsboro, OR (US);

Scott B. Clendenning, Portland, OR (US);

Van H. Le, Beaverton, OR (US);

Chia-Ching Lin, Portland, OR (US);

Jason C. Retasket, Beaverton, OR (US);

Edward O. Johnson, Jr., Saint Helens, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Akona IP PC

Primary Examiner:

Cuong B Nguyen

Int. Cl.
CPC ...
H01L 29/51 (2006.01); H10B 12/00 (2023.01); H10D 30/62 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/66 (2025.01); H10D 64/68 (2025.01); H10D 64/23 (2025.01);
U.S. Cl.
CPC ...
H10D 64/691 (2025.01); H10B 12/36 (2023.02); H10D 30/62 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 64/667 (2025.01); H10D 30/6219 (2025.01); H10D 30/6729 (2025.01); H10D 30/6739 (2025.01); H10D 30/6757 (2025.01); H10D 64/258 (2025.01);
Abstract

Described herein are transistor devices formed using perovskite gate dielectrics. In one example, a transistor includes a high-k perovskite dielectric material between a gate electrode and a thin film semiconductor channel. In another example, four-terminal transistor includes a semiconductor channel, a gate stack that includes a perovskite dielectric layer on one side of the channel, and a body electrode on an opposite side of the channel. The body electrode adjusts a threshold voltage of the transistor.

Find Patent Forward Citations

Sen Gupta, Arnab. (2026). Transistor devices with high-k perovskite gate dielectrics (U.S. Patent No. 12575165). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12575165

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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