Yi-Lung Cheng

This inventor holds 26 USPTO granted patents, primarily in Semiconductor Manufacturing. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2002-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Lung Cheng. Retrieved from https://idiyas.com/inventor/yi-lung-cheng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 26

% Patents Active = 30.8

Average Co-Inventor Count = 3.7

ph-index = 8

Forward Citations = 146(Granted Patents)

Location History:

Danshuei Jen, TW (2003)
Danshuei, TW (2006)
Danshuei, Taipei, TW (2006)
Taipei, TW (2002 - 2007)
Danshuei Township, Taipei County, TW (2007 - 2009)
Danshuei Township, TW (2008 - 2010)

Company Filing History:

26 out of 42,872

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2002-2010

Loading Chart...

Areas of Expertise:

Electro-Migration

Heat Dissipation

Film Deposition

Dielectric Layer

Copper Barrier

Surface Adhesion

CMP Process

Plasma Treatment

Interconnections

Device Structure

Nitride Barrier

Silicate Glass

26 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7646207 - Method for measuring a property of interconnections and structure for the same (2010-01-12),

2. 7512924 - Semiconductor device structure and methods of manufacturing the same (2009-03-31),

3. 7470584 - TEOS deposition method (2008-12-30),

4. 7449911 - Method for determining electro-migration failure mode (2008-11-11),

5. 7420277 - System for heat dissipation in semiconductor devices (2008-09-02),

6. 7296532 - Bypass gas feed system and method to improve reactant gas flow and film deposition (2007-11-20),

7. 7253121 - Method for forming IMD films (2007-08-07),

8. 7208415 - Plasma treatment method for electromigration reduction (2007-04-24),

9. 7176571 - Nitride barrier layer to prevent metal (Cu) leakage issue in a dual damascene structure (2007-02-13),

10. 7157367 - Device structure having enhanced surface adhesion and failure mode analysis (2007-01-02),

11. 7125802 - CMP process leaving no residual oxide layer or slurry particles (2006-10-24),

12. 7078336 - Method and system for fabricating a copper barrier layer with low dielectric constant and leakage current (2006-07-18),

13. 7074701 - Method of forming a borderless contact opening featuring a composite tri-layer etch stop material (2006-07-11),

14. 6979656 - Carbon and halogen doped silicate glass dielectric layer and method for fabricating the same (2005-12-27),

15. 6903019 - CMP process leaving no residual oxide layer or slurry particles (2005-06-07),

Title: The Innovative Journey of Yi-Lung Cheng

Introduction: Yi-Lung Cheng, a talented inventor hailing from Danshuei, Taiwan, has made significant contributions to the field of technology with his groundbreaking inventions.

Latest Patents: Cheng's latest patents focus on renewable energy solutions, including a solar-powered water purification system and a wind energy storage device, showcasing his commitment to sustainability and environmental innovation.

Career Highlights: With a career spanning over two decades, Cheng has established himself as a pioneer in the tech industry. His early work in semiconductor technology laid the foundation for his later ventures into renewable energy and smart devices.

Collaborations: Throughout his career, Cheng has collaborated with leading research institutions and universities to further his research and bring his inventions to life. His partnerships with top engineers and scientists have led to the development of cutting-edge technologies.

Conclusion: Yi-Lung Cheng's passion for innovation and dedication to creating a more sustainable future have solidified his reputation as a visionary inventor. His impact on the tech industry continues to inspire future generations of inventors worldwide.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]