Kanagawa, Japan

Yasutaka Nakashiba

This inventor holds 289 USPTO granted patents and 57 published patent applications and 3 EPO patents, primarily in Semiconductor Devices (CPC class H01L23-5227). Top assignees: Renesas Electronics Corporation, Nec Corporation, Nec Electronics Corporation. Active years: 1994-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasutaka Nakashiba. Retrieved from https://idiyas.com/inventor/yasutaka-nakashiba

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 289 

% Patents Active = 81.7

 

Average Co-Inventor Count = 1.7

ph-index = 14

Forward Citations = 1,096(Granted Patents)

Forward Citations (Not Self Cited) = 1,003(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Kawasaki, JP (2007 - 2017)
  • Kanagawa, JP (2005 - 2018)
  • Hitachinaka, JP (2019)
  • Ibaraki, JP (2017 - 2021)
  • Tokyo, JP (1994 - 2024)

Company Filing History:


Years Active: 1994-2026

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Areas of Expertise:
Semiconductor Device
Chip-to-Chip Bonding
Manufacturing Method
Optical Waveguide
Control System
Inductor
Semiconductor Module
Circuit Device
Thermal Management
3D Stacking
Communication Method
Device Fabrication
289 patents (USPTO):Explore Patents

Title: Yasutaka Nakashiba: A Pioneer in Semiconductor Technology

Introduction

Yasutaka Nakashiba is a prominent inventor based in Kanagawa, Japan. He has made significant contributions to the field of semiconductor technology, holding an impressive 289 patents to his name. His innovative work has paved the way for advancements in semiconductor devices, showcasing his expertise and dedication to the industry.

Latest Patents

Nakashiba's latest patents include groundbreaking designs for semiconductor devices. One notable patent describes a semiconductor device that features a first semiconductor chip with a multilayer wiring structure, including coils that are strategically overlapped with a second semiconductor chip. This design ensures that the second semiconductor chip is joined to the first without any offset structure, optimizing performance and efficiency. Another patent outlines a method of manufacturing a semiconductor device, which involves a first semiconductor chip mounted on a chip mounting portion via a bonding material, and a second semiconductor chip mounted on the first chip. This innovative approach utilizes both conductive and insulating bonding materials to enhance the functionality of the device.

Career Highlights

Throughout his career, Nakashiba has worked with leading companies in the semiconductor industry, including Renesas Electronics Corporation and NEC Corporation. His experience in these organizations has allowed him to refine his skills and contribute to various projects that have advanced semiconductor technology.

Collaborations

Nakashiba has collaborated with notable colleagues such as Hiroaki Ohkubo and Masayuki Furumiya. These partnerships have fostered a creative environment that has led to the development of innovative solutions in the semiconductor field.

Conclusion

Yasutaka Nakashiba's contributions to semiconductor technology are remarkable and have significantly impacted the industry. His extensive patent portfolio and collaborations with esteemed colleagues highlight his role as a leading inventor in this field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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