The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2024

Filed:

Dec. 01, 2020
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Tohru Kawai, Tokyo, JP;

Yasutaka Nakashiba, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01F 27/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/645 (2013.01); H01F 27/006 (2013.01);
Abstract

A semiconductor device has a semiconductor substrate, a first insulating layer, a first inductor, a second insulating layer, a second inductor, a pad and an annular wiring. The first insulating layer is formed on the semiconductor substrate. The first inductor is directly formed on the first insulating layer. The second insulating layer is formed on the first insulating layer such that the second insulating layer covers the first inductor. The second inductor is directly formed on the second insulating layer such that the second inductor faces the first inductor. The pad is directly formed on the second insulating layer. The pad is electrically connected with the second inductor. The annular wiring is electrically connected with the pad. The annular wiring is spaced apart from the second inductor. The annular wiring surrounds the second inductor without forming a vertex in plan view.


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