EPO Patents = 1

Average Co-Inventor Count = 2.7

ph-index = 16

Forward Citations = 800(Granted Patents)

Forward Citations (Not Self Cited) = 793(Dec 10, 2025)

Inventors with similar research interests:

Company Filing History:

66 out of 12,883

Advanced Micro Devices Corporation

Cypress Semiconductor Corporation

5. 1 out of 832,843

Other

patents

Years Active: 1999-2016

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Areas of Expertise:

Optical Lithography

Integrated Circuit Design

Photoresist Exposure

Mask Generation

Metrology Techniques

Phase Shift Masks

Semiconductor Fabrication

Trench Formation

Etch Process Optimization

Manufacturability Enhancement

Device Alignment

Conductive Plugs

72 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9274410 - Method and system for automated generation of masks for spacer formation from a desired final wafer pattern (2016-03-01),

2. 9064078 - Methods and systems for designing and manufacturing optical lithography masks (2015-06-23),

3. 8975195 - Methods for optical proximity correction in the design and fabrication of integrated circuits (2015-03-10),

4. 8003545 - Method of forming an electronic device including forming features within a mask and a selective removal process (2011-08-23),

5. 7657864 - System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques (2010-02-02),

6. 7543256 - System and method for designing an integrated circuit device (2009-06-02),

7. 7487492 - Method for increasing manufacturability of a circuit layout (2009-02-03),

8. 7368225 - Two mask photoresist exposure pattern for dense and isolated regions (2008-05-06),

9. 7313769 - Optimizing an integrated circuit layout by taking into consideration layout interactions as well as extra manufacturability margin (2007-12-25),

10. 7269804 - System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques (2007-09-11),

11. 7207017 - Method and system for metrology recipe generation and review and analysis of design, simulation and metrology results (2007-04-17),

12. 7194725 - System and method for design rule creation and selection (2007-03-20),

13. 7108946 - Method of lithographic image alignment for use with a dual mask exposure technique (2006-09-19),

14. 7076750 - Method and apparatus for generating trenches for vias (2006-07-11),

15. 7071085 - Predefined critical spaces in IC patterning to reduce line end pull back (2006-07-04),

Title: Todd P Lukanc - Innovator from San Jose

Introduction: Todd P Lukanc is a renowned inventor based in San Jose, California. With a passion for innovation and problem-solving, he has made significant contributions to various fields through his inventive spirit.

Latest Patents: Todd P Lukanc holds several patents in the areas of technology and consumer electronics, showcasing his expertise in creating cutting-edge solutions for everyday challenges.

Career Highlights: Throughout his career, Todd P Lukanc has worked with leading tech companies, where he has played a key role in developing groundbreaking products that have revolutionized the industry.

Collaborations: Known for his collaborative nature, Todd P Lukanc has partnered with top researchers and engineers to bring his ideas to life, fostering a culture of innovation and excellence in all his projects.

Conclusion: Todd P Lukanc's dedication to innovation and his remarkable track record of success make him a standout figure in the world of inventors, inspiring others to push the boundaries of what is possible.

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1 patent (EPO):

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