The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8975195 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 10, 2015

Filed:

Feb. 01, 2013
Applicant:

Globalfoundries, Inc., Grand Cayman, KY (US);

Inventors:

Todd Lukanc, San Jose, CA (US);

Christopher Heinz Clifford, San Francisco, CA (US);

Tamer Coskun, San Jose, CA (US);

Assignee:

GLOBALFOUNDRIES, Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/3105 (2006.01); H01L 21/312 (2006.01); G06F 17/50 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
G06F 17/50 (2013.01); H01L 21/02348 (2013.01); Y10S 438/942 (2013.01); Y10S 438/948 (2013.01);
Abstract

A method of manufacturing an optical lithography mask includes providing a patterned layout design comprising a plurality of polygons, correcting the patterned layout design using optical proximity correction (OPC) by adjusting widths and lengths of one or more of the plurality of polygons, to generate a corrected patterned layout design, converting the corrected patterned layout design into a mask writer-compatible format, to generate a mask writer-compatible layout design comprising the plurality of polygons, and biasing each polygon in the plurality of polygons with a bias that accounts for large-scale density values of the patterned layout design, to generate a biased, mask writer-compatible layout design.


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