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For the Inventor, By the Inventor

Hsinchu, Taiwan

Szu Wei Lu

This inventor holds 52 USPTO granted patents and 3 published patent applications, primarily in Semiconductor Packaging (CPC class H01L). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2007-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Szu Wei Lu. Retrieved from https://idiyas.com/inventor/szu-wei-lu-6mk5jxhp

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 52 

% Patents Active = 65.4

Average Co-Inventor Count = 4.1

ph-index = 10

Forward Citations = 1,288(Granted Patents)

Forward Citations (Not Self Cited) = 1,236(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal52 out of 42,926 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2007-2021

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Areas of Expertise:
Semiconductor Package
3D Integration
Die-on-Interposer
Flux Residue Cleaning
Molding Wafer Chamber
Stress Tuning Layer
Underfill Curing
Dicing Interposer
Self-Aligning Bump
Warpage Control
Chip-on-Wafer Assembly
Die Structure
52 patents (USPTO):Explore Patents
1. 11094639 - Semiconductor package (2021-08-17),
2. 10170295 - Flux residue cleaning system and method (2019-01-01),
3. 10115650 - Die-on-interposer assembly with dam structure and method of manufacturing the same (2018-10-30),
4. 10090253 - Semiconductor package (2018-10-02),
5. 9847315 - Packages, packaging methods, and packaged semiconductor devices (2017-12-19),
6. 9818697 - Semiconductor package manufacturing method (2017-11-14),
7. 9773724 - Semiconductor devices, methods of manufacture thereof, and semiconductor device packages (2017-09-26),
8. 9679783 - Molding wafer chamber (2017-06-13),
9. 9633954 - Methods of manufacturing an integrated circuit having stress tuning layer (2017-04-25),
10. 9620430 - Sawing underfill in packaging processes (2017-04-11),
11. 9502271 - Warpage control for flexible substrates (2016-11-22),
12. 9475272 - De-bonding and cleaning process and system (2016-10-25),
13. 9418876 - Method of three dimensional integrated circuit assembly (2016-08-16),
14. 9406588 - Semiconductor package and manufacturing method thereof (2016-08-02),
15. 9406500 - Flux residue cleaning system and method (2016-08-02),

Title: Szu Wei Lu: Innovator in Semiconductor Technology

Introduction

Szu Wei Lu, a prominent inventor based in Hsin-Chu, Taiwan, has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 52 patents, he has established a reputation for innovation and excellence within the industry.

Latest Patents

Among his latest inventions are groundbreaking patents that advance semiconductor packaging methods. One notable patent describes a manufacturing method for semiconductor packaging, which involves forming a redistribution layer (RDL) on a carrier and strategically placing a semiconductor die over a dummy portion of the RDL. Additionally, he has developed a package-on-package (PoP) semiconductor structure that enhances functionality through multi-layered design, featuring the formation of RDLs on polymer-based layers.

Another significant patent details a flux residue cleaning system designed to maintain the integrity of semiconductors. This system includes multiple immersion and spray chambers that effectively clean flux residues from microbumps between wafers and dies, ensuring a pure surface for semiconductor assembly. The methodology outlined in these patents reflects Szu Wei Lu's dedication to improving semiconductor manufacturing processes.

Career Highlights

Szu Wei Lu currently works at Taiwan Semiconductor Manufacturing Company Limited, a leader in the semiconductor industry. His role has allowed him to contribute to numerous innovative projects, cementing his status as a key player in semiconductor research and development.

Collaborations

Throughout his career, Szu Wei Lu has collaborated with esteemed colleagues including Jing-Cheng Lin and Shin-Puu Jeng. Their combined expertise and innovative approaches have propelled advancements in semiconductor technology, fostering a collaborative environment that encourages the sharing of ideas and solutions.

Conclusion

Szu Wei Lu's work exemplifies the spirit of innovation in the semiconductor industry. With his extensive patent portfolio and ongoing collaborations, he continues to push the boundaries of what is possible in semiconductor technology, shaping the future of electronic devices and applications worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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