The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Sep. 02, 2011
Jing-cheng Lin, Hsin-Chu, TW;
Weng-jin Wu, Hsin-Chu, TW;
Shih Ting Lin, Taipei, TW;
Cheng-lin Huang, Hsin-Chu, TW;
Szu Wei LU, Hsin-Chu, TW;
Shin-puu Jeng, Hsin-Chu, TW;
Chen-hua Yu, Hsin-Chu, TW;
Jing-Cheng Lin, Hsin-Chu, TW;
Weng-Jin Wu, Hsin-Chu, TW;
Shih Ting Lin, Taipei, TW;
Cheng-Lin Huang, Hsin-Chu, TW;
Szu Wei Lu, Hsin-Chu, TW;
Shin-Puu Jeng, Hsin-Chu, TW;
Chen-Hua Yu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method of fabricating a three-dimensional integrated circuit comprises attaching a wafer to a carrier, mounting a plurality of semiconductor dies on top of the wafer to form a wafer stack. The method further comprises forming a molding compound layer on top of the wafer, attaching the wafer stack to a tape frame and dicing the wafer stack to separate the wafer stack into a plurality of individual packages.