Taichung, Taiwan

Po-Chin Chang

This inventor holds 32 USPTO granted patents and 21 published patent applications, primarily in Semiconductor Devices. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Po-Chin Chang. Retrieved from https://idiyas.com/inventor/po-chin-chang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 32 

% Patents Active = 96.9

Average Co-Inventor Count = 5.6

ph-index = 3

Forward Citations = 3,200(Granted Patents)


Location History:

  • Hsin-Chu, TW (2016)
  • Taichung, TW (2020 - 2024)

Company Filing History:


Years Active: 2016-2026

Loading Chart...
Areas of Expertise:
Semiconductor Device
Pattern Loading
Fine Line Patterning
Metal Gate
Stacked Via Contact
Conductive Structure
Directional Process
Capping Structures
Ion Beam Etching
Elongated Pattern
32 patents (USPTO):Explore Patents

Title: Innovations of Po-Chin Chang in Semiconductor Manufacturing

Introduction: Po-Chin Chang, an accomplished inventor based in Taichung, Taiwan, has made significant contributions to the field of semiconductor manufacturing. With a remarkable portfolio of 21 patents, he has established himself as a key figure in advancing technologies that enhance semiconductor device performance and manufacturing efficiency.

Latest Patents: Among his recent inventions, two notable patents stand out. The first patent, titled "Method of Manufacturing Semiconductor Devices Using Directional Process," introduces an innovative approach to semiconductor fabrication. This method involves the formation of an underlying structure over a substrate and a subsequent film formation. The key aspect is the measurement and storage of surface topography data, which enables precise local etching through directional etching techniques, adjusting plasma beam intensity according to the collected topography data.

The second patent, "Capping Structures in Semiconductor Devices," delineates a detailed fabrication method for semiconductor devices. It describes the formation of a fin structure on a substrate, the fabrication of source/drain (S/D) regions, and the establishment of a gate structure adjacent to the S/D region. The complexity of this method lies in the multi-layered capping structure, which comprises a conductive cap, a cap liner, and a carbon-based cap, enhancing device stability and performance.

Career Highlights: Po-Chin Chang currently plays an integral role at Taiwan Semiconductor Manufacturing Company Ltd., where he leverages his expertise in semiconductor technology. His work focuses on innovating processes that boost the efficiency and effectiveness of semiconductor devices, supporting the ever-evolving electronics landscape.

Collaborations: Collaborating with esteemed colleagues such as Pinyen Lin and Li-Te S Lin, Po-Chin thrives in a dynamic environment that fosters innovation. Together, they contribute to the advancement of semiconductor technology, pushing boundaries that define modern manufacturing practices.

Conclusion: Po-Chin Chang’s contributions to semiconductor manufacturing through his patents and professional collaboration mark him as a significant innovator in the field. His methods not only enhance production quality but also pave the way for future advancements in semiconductor technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…