Albany, NY, United States of America

Paul Alan McConnelee

This inventor holds 63 USPTO granted patents and 2 published patent applications, primarily in Embedded Electronics Packaging (CPC class H01L). Top assignees: General Electric Company, Lockheed Martin Corporation, United States of America as Represented by the Secretary of the Air Force. Active years: 1980-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Paul Alan McConnelee. Retrieved from https://idiyas.com/inventor/paul-alan-mcconnelee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 63 

% Patents Active = 98.4

Average Co-Inventor Count = 3.1

ph-index = 12

Forward Citations = 521(Granted Patents)

Forward Citations (Not Self Cited) = 431(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Schenectady, NY (US) (1980 - 2014)
  • Albany, NY (US) (2011 - 2023)

Company Filing History:


Years Active: 1980-2023

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Areas of Expertise:
Embedded Semiconductor
Power Electronics
Micro-Via Structure
Electrical Interconnect
Integrated Circuit
Ultra-Thin Package
Surface Mount Module
Die Module
Barrier Coating
Lamination Adhesive
Leadframe Connections
Chip Package
63 patents (USPTO):Explore Patents

Title: The Innovative Legacy of Paul Alan McConnelee

Introduction

Paul Alan McConnelee, an inventive force hailing from Albany, NY, has made significant contributions to the field of semiconductor technology. With a remarkable portfolio of 63 patents, McConnelee's work has revolutionized the way electronic devices are conceived and manufactured, paving the way for advancements in various applications.

Latest Patents

Among his latest innovations is the patent for an **Ultra-thin embedded semiconductor device package and method of manufacturing thereof**. This groundbreaking design features a package structure that integrates a first dielectric layer with semiconductor devices attached. The embedding material used allows for an innovative arrangement of multiple dielectric layers, and Vias are ingeniously formed to ensure optimal electrical interconnections. The inclusion of input/output connections enhances versatility, enabling a second level connection to external circuits, thereby facilitating efficient and compact device assembly.

Another significant contribution is the **Power electronics package and method of manufacturing thereof**. This patent describes an electronics package built with a glass substrate, characterized by varying thicknesses that optimize performance. It features an adhesive layer that supports a semiconductor device while a first metallization layer ensures reliable electrical connectivity. This inventive design enhances the mechanical and electrical efficiency of power electronics, showing McConnelee's dedication to advancing technology.

Career Highlights

Throughout his impressive career, McConnelee has been affiliated with prominent companies such as General Electric Company and Lockheed Martin Corporation. His tenure at these leading firms has allowed him to collaborate on numerous innovative projects, consolidating his reputation as a key contributor to the technology sector.

Collaborations

In the course of his career, McConnelee has collaborated with brilliant minds such as Arun Virupaksha Gowda and Kevin Matthew Durocher. These partnerships reflect his commitment to teamwork and innovation, as he continues to inspire and contribute to technological advancements alongside other talented professionals.

Conclusion

Paul Alan McConnelee stands out not only for his numerous patents but also for his impactful contributions to the field of semiconductor technology. His dedication to innovation and his collaborations with industry leaders serve as a testament to his significant role in shaping the future of electronic devices. As he continues to push the boundaries of what is possible, McConnelee remains a vital figure in the realm of inventions and innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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