The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2019

Filed:

Jan. 19, 2016
Applicant:

General Electric Company, Schenectady, NY (US);

Inventors:

Arun Virupaksha Gowda, Rexford, NY (US);

Paul Alan McConnelee, Albany, NY (US);

Nancy Cecelia Stoffel, Niskayuna, NY (US);

Risto Ilkka Tuominen, Tokyo, JP;

Assignee:

General Electric Company, Schenectady, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/055 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 25/16 (2006.01); H01L 23/04 (2006.01); H01L 23/08 (2006.01); H01L 23/15 (2006.01); H01L 23/538 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4853 (2013.01); H01L 23/04 (2013.01); H01L 23/055 (2013.01); H01L 23/08 (2013.01); H01L 23/15 (2013.01); H01L 23/3121 (2013.01); H01L 23/49827 (2013.01); H01L 23/5384 (2013.01); H01L 24/19 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 25/105 (2013.01); H01L 25/16 (2013.01); H01L 23/49894 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/24195 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/9222 (2013.01); H01L 2224/92144 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/19011 (2013.01); H01L 2924/19105 (2013.01);
Abstract

An electronics package is disclosed herein that includes a glass substrate having an exterior portion surrounding an interior portion thereof, wherein the interior portion has a first thickness and the exterior portion has a second thickness larger than the first thickness. An adhesive layer is formed on a lower surface of the interior portion of the glass substrate. A semiconductor device having an upper surface is coupled to the adhesive layer, the semiconductor device having at least one contact pad disposed on the upper surface thereof. A first metallization layer is coupled to an upper surface of the glass substrate and extends through a first via formed through the first thickness of the glass substrate to couple with the at least one contact pad of the semiconductor device.


Find Patent Forward Citations

Loading…