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For the Inventor, By the Inventor

Austin, TX, United States of America

Leo M Higgins, Iii

This inventor holds 60 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Packaging (CPC class H01L). Top assignees: Freescale Semiconductor,inc., Motorola Corporation, Nxp USA, Inc.. Active years: 1990-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Leo M Higgins, Iii. Retrieved from https://idiyas.com/inventor/leo-m-higgins-iii

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 60 

% Patents Active = 93.3

Average Co-Inventor Count = 1.5

ph-index = 24

Forward Citations = 2,170(Granted Patents)

Forward Citations (Not Self Cited) = 2,153(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Lakeville, MA (US) (1990 - 1992)
  • Middleboro, MA (US) (1991 - 1992)
  • Austin, TX (US) (1991 - 2019)

Company Filing History:

goldMedal23 out of 5,491 
 
Freescale Semiconductor,inc.
 patents
silverMedal20 out of 20,290 
 
Motorola Corporation
 patents
bronzeMedal8 out of 2,846 
 
Nxp USA, Inc.
 patents
4. 5 out of 97 
 
Prime Computer Inc.
 patents
5. 3 out of 69 
 
A-Sat Corporation
 patents
6. 1 out of 5,322 
 
Nxp B.v.
 patents

Years Active: 1990-2019

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Areas of Expertise:
Integrated Circuit
Semiconductor Device
Wire Bonding
Thermal Management
Stacked Die
Encapsulant
Heat Spreader
Corrosion Protection
Die Assembly
Inductive Communication
Laser Dicing
Packaging Methods
60 patents (USPTO):Explore Patents
1. 10446476 - Packaged integrated circuit having stacked die and method for therefor (2019-10-15),
2. 10347534 - Variable stealth laser dicing process (2019-07-09),
3. 10325876 - Surface finish for wirebonding (2019-06-18),
4. 10249557 - Packaged integrated circuit device and methods (2019-04-02),
5. 10242935 - Packaged semiconductor device and method for forming (2019-03-26),
6. 10037965 - Semiconductor device having a protective material with a first pH formed around cooper wire bonds and aluminum pads for neutralizes a second pH of an outer encapsulant material (2018-07-31),
7. 9935079 - Laser sintered interconnections between die (2018-04-03),
8. 9899290 - Methods for manufacturing a packaged device with an extended structure for forming an opening in the encapsulant (2018-02-20),
9. 9685351 - Wire bond mold lock method and structure (2017-06-20),
10. 9508622 - Method for protecting copper wire bonds on aluminum pads of a semiconductor device from corrosion (2016-11-29),
11. 9470652 - Sensing field effect transistor devices and method of their manufacture (2016-10-18),
12. 9461012 - Copper ball bond features and structure (2016-10-04),
13. 9461009 - Method and apparatus for assembling a semiconductor package (2016-10-04),
14. 9324667 - Semiconductor devices with compliant interconnects (2016-04-26),
15. 9287200 - Packaged semiconductor device (2016-03-15),

Title: **The Innovative Contributions of Leo M Higgins, III**

Introduction

Leo M Higgins, III is a notable inventor based in Austin, Texas, recognized for his substantial contributions to the field of integrated circuits and semiconductor technologies. With an impressive portfolio of 60 patents, Higgins has greatly impacted the industry with innovative solutions that enhance the functionality and efficiency of electronic devices.

Latest Patents

Among his latest innovations is the patent for a **packaged integrated circuit having stacked die and method for therefor**. This invention outlines a sophisticated design for a packaged integrated circuit device that incorporates a first IC die and a second IC die aligned to communicate effectively through inductors. The design features multiple layers of adhesive and an isolation layer, which optimally enhances the performance of the stacked dies.

Another significant patent is the **variable stealth laser dicing process**. This method presents an innovative approach for separating integrated circuit device dies from a wafer, utilizing a combination of dicing tape and targeted modifications in each cutting lane. By controlling the thickness of the modification zones, Higgins has created a method that allows for the propagation of cracks in a strategic fashion to cleanly separate active devices within the wafer.

Career Highlights

Higgins has held key positions at prominent companies, including Freescale Semiconductor, Inc. and Motorola Corporation. His work in these companies has allowed him to push the boundaries of semiconductor technology, leading to the development of pioneering products in the industry.

Collaborations

Throughout his career, Leo has collaborated with several talented individuals, including Burton Jesse Carpenter and Varughese Mathew. These partnerships have played a vital role in the development of his innovative patents, contributing to the advancement of integrated circuit technologies.

Conclusion

With his 60 patents, Leo M Higgins, III stands as a leading figure in the field of integrated circuits. His latest innovations, coupled with his experience at prominent semiconductor companies, demonstrate his invaluable contributions to technology. His work not only benefits the industry but also shapes the future of electronic device design and manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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