The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Sep. 12, 2017
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Martin Lapke, Hamburg, DE;

Hartmut Buenning, Hamburg, DE;

Sascha Moeller, Hamburg, DE;

Guido Albermann, Hamburg, DE;

Michael Zernack, Hamburg, DE;

Leo M. Higgins, III, Austin, TX (US);

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/268 (2006.01); H01L 21/304 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/268 (2013.01); H01L 21/304 (2013.01); H01L 21/6836 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68336 (2013.01);
Abstract

Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.


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