logo

For the Inventor, By the Inventor

South Burlington, VT, United States of America

Johnatan A Kantarovsky

LinkedIn

This inventor holds 36 USPTO granted patents and 17 published patent applications, primarily in High Electron Mobility Transistors. Top assignees: Globalfoundries U.S. Inc., Globalfoundries Singapore Pte. Ltd.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Johnatan A Kantarovsky. Retrieved from https://idiyas.com/inventor/johnatan-a-kantarovsky

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 36 

% Patents Active = 88.9

Average Co-Inventor Count = 4.3

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:

goldMedal35 out of 1,090 
 
Globalfoundries U.S. Inc.
 patents
silverMedal1 out of 1,060 
 
Globalfoundries Singapore Pte. Ltd.
 patents

Years Active: 2021-2026

Loading Chart...
Areas of Expertise:
High Electron Mobility Transistors
Airgap Structures
Integrated Circuit Design
Field Effect Transistors
Temperature Detection
Electrical Fuse
Silicided Polysilicon
Charge Collection
Dual Isolation
Multi-Level Gate
Non-Planar Semiconductors
Bipolar Devices
36 patents (USPTO):Explore Patents
1. 12757468 - HEMT device with field plates (2026-10-06),
2. 12666961 - Heater elements (2026-06-23),
3. 12604735 - Device with airgap structure (2026-04-14),
4. 12581701 - Device with dual isolation structure (2026-03-17),
5. 12550410 - High electron mobility transistors (2026-02-10),
6. 12417975 - Electrically programmable fuse over crystalline semiconductor materials (2025-09-16),
7. 12416530 - Temperature detection using negative temperature coefficient resistor in GaN setting (2025-09-16),
8. 12400927 - High-mobility-electron transistors having heat dissipating structures (2025-08-26),
9. 12389622 - High electron mobility transistor devices having a silicided polysilicon layer (2025-08-12),
10. 12255235 - Field effect transistors with dual field plates (2025-03-18),
11. 12243935 - High electron mobility transistor devices having a silicided polysilicon layer (2025-03-04),
12. 12183814 - Multi-channel transistor (2024-12-31),
13. 12166476 - High voltage device with linearizing field plate configuration (2024-12-10),
14. 12159910 - Isolation regions for charge collection and removal (2024-12-03),
15. 12154956 - Structure including multi-level field plate and method of forming the structure (2024-11-26),

Couldn't find inventor

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…