The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Sep. 13, 2022
Applicant:

Globalfoundries U.s. Inc., Malta, NY (US);

Inventors:

Johnatan A. Kantarovsky, South Burlington, VT (US);

Rebouh Benelbar, Murphy, TX (US);

Ajay Raman, Essex Junction, VT (US);

Michel J. Abou-Khalil, Essex-Junction, VT (US);

Rajendran Krishnasamy, Essex Junction, VT (US);

Randy L Wolf, Essex Junction, VT (US);

Assignee:

GLOBALFOUNDRIES U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/23 (2025.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/258 (2025.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01); H10D 64/01 (2025.01);
Abstract

The present disclosure relates to semiconductor structures and, more particularly, to high-electron-mobility transistors and methods of manufacture. A structure includes: a semiconductor layer on a semiconductor material; a gate structure on the semiconductor layer; a drain region comprising the semiconductor layer and which is adjacent to the gate structure; an ohmic contact which includes at least one terminal connection connecting to the semiconductor material, the ohmic contact being adjacent to the drain region and spaced away from the gate structure; and a capacitance reducing structure adjacent to the drain region.


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