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For the Inventor, By the Inventor

Latham, NY, United States of America

Jianwei Peng

This inventor holds 33 USPTO granted patents and 9 published patent applications and 1 EPO patent, primarily in Semiconductor Technology. Top assignees: Globalfoundries Inc., Globalfoundries U.S. Inc.. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jianwei Peng. Retrieved from https://idiyas.com/inventor/jianwei-peng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 78.8

 

Average Co-Inventor Count = 4.2

ph-index = 6

Forward Citations = 96(Granted Patents)


Location History:

  • Ballston Spa, NY (US) (2016)
  • Albany, NY (US) (2016)
  • Ballston Lake, NY (US) (2016 - 2017)
  • Latham, NY (US) (2018 - 2021)
  • Clifton Park, NY (US) (2020 - 2024)

Company Filing History:

goldMedal24 out of 5,671 
 
Globalfoundries Inc.
 patents
silverMedal9 out of 1,090 
 
Globalfoundries U.S. Inc.
 patents

Years Active: 2016-2026

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Areas of Expertise:
Transistor Arrays
Semiconductor Devices
Epitaxial Structures
FinFETs
Field-Effect Transistors
Silicide Layers
Vertical Field Effect Transistor
Multi-Layer Spacers
Diffusion Blocking
Capacitors
Source/Drain Regions
EPI Semiconductor Material
33 patents (USPTO):Explore Patents
1. 12532534 - Transistor arrays with controllable gate voltage (2026-01-20),
2. 12513995 - Substrates of semiconductor devices having varying thicknesses of semiconductor layers (2025-12-30),
3. 12414343 - Semiconductor device with different sized epitaxial structures (2025-09-09),
4. 12389616 - Transistors with multiple silicide layers (2025-08-12),
5. 12020937 - Carbon implantation for thicker gate silicide (2024-06-25),
6. 11935928 - Bipolar transistor with self-aligned asymmetric spacer (2024-03-19),
7. 11810951 - Semiconductor-on-insulator field effect transistor with performance-enhancing source/drain shapes and/or materials (2023-11-07),
8. 11798948 - Semiconductor structure with shared well (2023-10-24),
9. 11101364 - Field-effect transistors with diffusion blocking spacer sections (2021-08-24),
10. 10910471 - Device with large EPI in FinFETs and method of manufacturing (2021-02-02),
11. 10784342 - Single diffusion breaks formed with liner protection for source and drain regions (2020-09-22),
12. 10468310 - Spacer integration scheme for FNET and PFET devices (2019-11-05),
13. 10453754 - Diffused contact extension dopants in a transistor device (2019-10-22),
14. 10446483 - Metal-insulator-metal capacitors with enlarged contact areas (2019-10-15),
15. 10431665 - Multiple-layer spacers for field-effect transistors (2019-10-01),

Title: Inventor Jianwei Peng

Introduction: Jianwei Peng is a renowned inventor based in Latham, NY (US) known for his groundbreaking contributions to various technological fields.

Latest Patents: Jianwei Peng holds several patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing his diverse range of expertise.

Career Highlights: With over two decades of experience in the innovation industry, Jianwei Peng has successfully developed and commercialized numerous inventions that have had a significant impact on society.

Collaborations: Throughout his career, Jianwei Peng has collaborated with leading research institutions, universities, and companies to further advance his inventions and bring them to the market.

Conclusion: Jianwei Peng's dedication to innovation and his passion for creating solutions to complex problems have solidified his reputation as a pioneering inventor in the technology sector.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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