The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2021
Filed:
Jul. 11, 2018
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Jianwei Peng, Latham, NY (US);
Sang Woo Lim, Ballston Spa, NY (US);
Matthew Wahlquist Stoker, Ballston Lake, NY (US);
Huang Liu, Mechanicville, NY (US);
Jinping Liu, Ballston Lake, NY (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/08 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0847 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01);
Abstract
A method of forming a logic or memory cell with an epi-RSD width of larger than 1.3× fin pitch and the resulting device are provided. Embodiments include a device including a RSD region formed on each of a plurality of fins over a substrate, wherein the RSD has a width larger than 1.3× fin pitch, a TS formed on the RSD, and an ILD formed over the TS.