The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2026

Filed:

Dec. 13, 2022
Applicant:

Globalfoundries U.s. Inc., Malta, NY (US);

Inventors:

Venkatesh P. Gopinath, Fremont, CA (US);

Navneet Jain, Milpitas, CA (US);

Hongru Ren, Mechanicville, NY (US);

Alexander Derrickson, Saratoga Springs, NY (US);

Jianwei Peng, Clifton Park, NY (US);

Bipul C. Paul, Mechanicville, NY (US);

Assignee:

GlobalFoundries U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/03 (2025.01); H01L 21/768 (2006.01); H10B 63/00 (2023.01); H10D 64/27 (2025.01); H10D 64/66 (2025.01); H10D 84/01 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H01L 21/76895 (2013.01); H10B 63/34 (2023.02); H10D 64/411 (2025.01); H10D 64/663 (2025.01); H10D 84/0149 (2025.01);
Abstract

Structures that include field-effect transistors and methods of forming such structures. The structure comprises a substrate, a dielectric layer on the substrate, a first field-effect transistor including a first semiconductor layer over the dielectric layer and a first gate electrode, and a second field-effect transistor including a second semiconductor layer over the dielectric layer and a second gate electrode adjacent to the first gate electrode. The second semiconductor layer is connected to the first semiconductor layer, and the first and second semiconductor layers are positioned between the first gate electrode and the second gate electrode.


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