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For the Inventor, By the Inventor

Tainan, Taiwan

Hung-Che Liao

This inventor holds 20 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Technology. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 1999-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hung-Che Liao. Retrieved from https://idiyas.com/inventor/hung-che-liao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20 

% Patents Active = 80.0

Average Co-Inventor Count = 3.8

ph-index = 3

Forward Citations = 78(Granted Patents)


Location History:

  • Changhua Hsien, TW (2000)
  • Hsin-Chu, TW (2001 - 2023)
  • Tainan, TW (1999 - 2024)

Company Filing History:

goldMedal20 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 1999-2025

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Areas of Expertise:
Semiconductor Device
Non-Volatile Memory
Flash Memory
Integrated Circuit
Damascene Process
Contact Structure
Stacked Gate Structure
High Aspect Ratio
Passivation Sidewall
Butted Contact Resistance
Microelectronic Device
Thermal Treatment
20 patents (USPTO):Explore Patents
1. 12464714 - Semiconductor device having non-continuous wall structure surrounding a stacked gate structure including a conductive layer disposed between segmented portions of the wall structure (2025-11-04),
2. 11925017 - Semiconductor device having a wall structure surrounding a stacked gate structure (2024-03-05),
3. 11594449 - Method of making a semiconductor structure (2023-02-28),
4. 11121141 - Semiconductor structure and method for forming the same (2021-09-14),
5. 10964589 - Semiconductor structure (2021-03-30),
6. 10535670 - Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same (2020-01-14),
7. 10283604 - Contact structure for high aspect ratio and method of fabricating the same (2019-05-07),
8. 10283510 - Semiconductor structure and method for forming the same (2019-05-07),
9. 9825046 - Flash memory device having high coupling ratio (2017-11-21),
10. 9768182 - Semiconductor structure and method for forming the same (2017-09-19),
11. 9735049 - Method for fabricating semiconductor structure with passivation sidewall block (2017-08-15),
12. 9666588 - Damascene non-volatile memory cells and methods for forming the same (2017-05-30),
13. 9449976 - Semiconductor device structure and method for manufacturing the same (2016-09-20),
14. 9082617 - Integrated circuit and fabricating method thereof (2015-07-14),
15. 9076727 - Damascene non-volatile memory cells and methods for forming the same (2015-07-07),

Title: The Innovative Journey of Inventor Hung-Che Liao

Introduction:

Hung-Che Liao, a talented inventor hailing from Tainan, Taiwan, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents:

Hung-Che Liao's latest patents focus on advancements in renewable energy technologies, particularly in the development of solar power systems that are more efficient and cost-effective.

Career Highlights:

With a career spanning over two decades, Hung-Che Liao has established himself as a leading figure in the renewable energy sector. His work has been instrumental in driving forward the adoption of sustainable energy solutions on a global scale.

Collaborations:

Throughout his career, Hung-Che Liao has collaborated with various research institutions, universities, and companies to further his research and bring his inventions to life. His collaborative efforts have led to the successful implementation of several innovative technologies in the market.

Conclusion:

Inventor Hung-Che Liao's passion for innovation and dedication to creating a more sustainable future have solidified his reputation as a visionary in the field of renewable energy. His contributions continue to inspire and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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