The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2015
Filed:
Dec. 17, 2013
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Po-Yuan Su, Kaohsiung, TW;
Hung-Ta Huang, Tainan, TW;
Ping-Hao Lin, Tainan, TW;
Hung-Che Liao, Tainan, TW;
Hung-Yu Chiu, Tainan, TW;
Chao-Hsuan Pan, Kaohsiung, TW;
Wen-Tsung Chen, Tainan, TW;
Chih-Ming Huang, Tainan, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.