The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2019
Filed:
Jul. 31, 2015
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Szu-Hsien Lu, Tainan, TW;
Hung-Che Liao, Tainan, TW;
Kun-Tsang Chuang, Miaoli County, TW;
Shih-Lu Hsu, Tainan, TW;
Yu-Chu Lin, Tainan, TW;
Jyun-Guan Jhou, Taoyuan, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Abstract
A method of fabricating semiconductor device includes forming a plurality of gate structures on a semiconductor substrate. A first inter layer dielectric layer is deposited on the gate structures. A first contact plug is formed in the first inter layer dielectric layer in between every two immediately adjacent gate structures. An etch stop layer is deposited on the first inter layer dielectric layer. A second inter layer dielectric layer is deposited on the first inter layer dielectric layer. A second contact plug is formed in the second inter layer dielectric layer aligning with the first contact plug. A metal layer is deposited overlying the second inter layer dielectric layer and the second contact plug.