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For the Inventor, By the Inventor

Jhubei, Taiwan

Hsueh-Liang Chou

This inventor holds 59 USPTO granted patents and 7 published patent applications, primarily in Power MOSFET Technology (CPC class H01L). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2008-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hsueh-Liang Chou. Retrieved from https://idiyas.com/inventor/hsueh-liang-chou

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 59 

% Patents Active = 74.6

Average Co-Inventor Count = 3.9

ph-index = 8

Forward Citations = 217(Granted Patents)

Forward Citations (Not Self Cited) = 191(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Zhubei, TW (2008)
  • Jhubei, TW (2009 - 2022)
  • Hsinchu County, TW (2018 - 2022)

Company Filing History:

goldMedal59 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2008-2026

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Areas of Expertise:
Power MOSFET
Vertical Transistor
Trench Isolation
Lateral DMOS
FinFET
Field Plate Design
Integrated Circuit
Photodiode Device
Semiconductor Device
MOSFET Structure
Dummy Gate
Manufacturing Method
59 patents (USPTO):Explore Patents
1. 12622237 - Trench isolation connectors for stacked structures (2026-05-05),
2. 12230709 - Transistor structure and manufacturing method of the same (2025-02-18),
3. 11456380 - Transistor structure and manufacturing method of the same (2022-09-27),
4. 11424244 - Integrated circuit having a vertical power MOS transistor (2022-08-23),
5. 11031495 - Apparatus and method for power MOS transistor (2021-06-08),
6. 10964810 - Methodology and structure for field plate design (2021-03-30),
7. 10840246 - Integrated circuit having a vertical power MOS transistor (2020-11-17),
8. 10727334 - Lateral DMOS device with dummy gate (2020-07-28),
9. 10686065 - Apparatus and method for power MOS transistor (2020-06-16),
10. 10680100 - Field structure and methodology (2020-06-09),
11. 10636904 - Methodology and structure for field plate design (2020-04-28),
12. 10510880 - Trench power MOSFET (2019-12-17),
13. 10453955 - Lateral DMOS device with dummy gate (2019-10-22),
14. 10304829 - Integrated circuit having a vertical power MOS transistor (2019-05-28),
15. 10205037 - Photodiode device and manufacturing method thereof (2019-02-12),

Title: Hsueh-Liang Chou: A Pioneer in Transistor Technology

Introduction: Hsueh-Liang Chou, based in Jhubei, Taiwan, is a prominent inventor known for his significant contributions to transistor technology. With an impressive portfolio of 58 patents, Chou continues to push the boundaries of innovation in the semiconductor field.

Latest Patents: Chou's latest patents include groundbreaking advancements in transistor structures and their manufacturing methods. One of his recent disclosures outlines a transistor structure that features a substrate, a first gate extending along a longitudinal direction over the substrate, and a second gate positioned apart from the first. This inventive design incorporates a source region of a first conductivity type and a P-type well surrounding the source region, enhancing the efficiency and performance of transistors. Another notable patent details a self-aligning transistor structure that optimizes conductive regions in relation to the gates, providing a method for manufacturing that reinforces the accuracy and reliability of the devices produced.

Career Highlights: Hsueh-Liang Chou is affiliated with Taiwan Semiconductor Manufacturing Company Ltd., a leading entity in the semiconductor industry. His work has substantially contributed to advancements that have widespread applications in electronics, impacting numerous sectors beyond just semiconductor manufacturing.

Collaborations: Throughout his career, Chou has collaborated with talented professionals, including Ruey-Hsin Liu and Po-Chih Su. These collaborations have fostered a dynamic work environment and facilitated the sharing of innovative ideas, leading to several successful patents and enhanced technologies.

Conclusion: Hsueh-Liang Chou's work exemplifies the spirit of innovation within the semiconductor industry. His contributions not only advance the technology of transistors but also inspire future innovations. With a solid foundation of patents and a commitment to research and development, Chou continues to be a key figure in shaping the future of electronics through his inventive prowess.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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