The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Oct. 15, 2018
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chun-Wai Ng, Hsinchu, TW;

Hsueh-Liang Chou, Jhubei, TW;

Ruey-Hsin Liu, Hsinchu, TW;

Po-Chih Su, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 21/265 (2006.01); H01L 21/02 (2006.01); H01L 21/266 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/02233 (2013.01); H01L 21/266 (2013.01); H01L 21/26586 (2013.01); H01L 29/0878 (2013.01); H01L 29/0882 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/4236 (2013.01); H01L 29/495 (2013.01); H01L 29/4916 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/41766 (2013.01); H01L 29/42368 (2013.01);
Abstract

A device includes a semiconductor region of a first conductivity type, a trench extending into the semiconductor region, and a conductive field plate in the trench. A first dielectric layer separates a bottom and sidewalls of the field plate from the semiconductor region. A main gate is disposed in the trench and overlapping the field plate. A second dielectric layer is disposed between and separating the main gate and the field plate from each other. A Doped Drain (DD) region of the first conductivity type is under the second dielectric layer, wherein an edge portion of the main gate overlaps the DD region. A body region includes a first portion at a same level as a portion of the main gate, and a second portion at a same level as, and contacting, the DD region, wherein the body region is of a second conductivity type opposite the first conductivity type.


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