This inventor holds 70 USPTO granted patents, primarily in Semiconductor Manufacturing (CPC class H01L). Top assignees: Kabushiki Kaisha Toshiba, Ibiden Company Limited, Tokyo Electron Limited. Active years: 1993-2013.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Inventors with similar research interests:
Location History:
- Kanagawa-ken, JP (1997 - 2008)
- Kanagawa, JP (1995 - 2011)
- Fujisawa, JP (1993 - 2013)
Company Filing History:
65 out of 53,250 
3 out of 1,483 
3 out of 10,883 
Years Active: 1993-2013
Areas of Expertise:
Title: **Innovations by Hisashi Kaneko: A Leader in Semiconductor Technologies**
Introduction
Hisashi Kaneko, based in Fujisawa, Japan, has made significant contributions to the field of semiconductor technology, holding an impressive total of 70 patents. His work primarily revolves around the reliability evaluation of semiconductor devices and methods to enhance manufacturing processes, showcasing his vital role in advancing innovation in this industry.
Latest Patents
Hisashi Kaneko's recent patents reflect his dedication to improving the performance and reliability of semiconductor devices. Notable among these are:
1. **Reliability Evaluation Test Apparatus** - This invention includes a wafer storage section that stores a wafer while ensuring complete electrical contact between the electrode pads of devices formed on the wafer and the bumps of a contactor. It features a hermetic and heat-insulating structure, along with a pressure mechanism for pressing the contactor and a heating mechanism that heats the wafer to a high temperature, enabling thorough reliability evaluations.
2. **Reliability Evaluation Test System** - This system encompasses the apparatus mentioned above and is crucial for comprehensive testing within semiconductor manufacturing environments.
3. **Contactor** - This innovation is integral to the testing apparatus, facilitating high-fidelity tests.
4. **Reliability Evaluation Test Method** - This method allows for accelerated evaluation conditions of interconnection and insulating films formed on semiconductor wafers, ensuring enhanced product performance.
5. **Method of Manufacturing a Semiconductor Device** - This patented method addresses the removal of damage layers and native oxide films within connection holes, employing a combination of dry and wet processes to optimize the semiconductor fabrication process.
Career Highlights
Hisashi Kaneko's experience with Kabushiki Kaisha Toshiba highlights his status as a prominent inventor in semiconductor technologies. His practical application of his knowledge has not only contributed to his personal achievements but also to the broader field of electronics.
Collaborations
Throughout his career, Kaneko has collaborated with notable professionals in his field, including Tetsuo Matsuda and Masahiko Hasunuma. These collaborations have aided the development of innovative technologies and methodologies, further propelling advancements in semiconductor reliability and efficiency.
Conclusion
Hisashi Kaneko is an influential inventor, whose 70 patents signify his profound impact on the semiconductor industry. His dedication to improving the reliability and manufacturing methods of semiconductor devices demonstrates a lasting commitment to innovation, serving as an inspiring figure for future inventors and researchers in this vital field.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile