Tokyo, Japan

Hiroki Nakamura

This inventor holds 247 USPTO granted patents and 21 published patent applications and 19 EPO patents, primarily in Semiconductor Devices (CPC class H01L29-7827). Top assignees: Unisantis Electronics Singapore Pte. Ltd., Universal Entertainment Corporation, Aruze Gaming America, Inc.. Active years: 1988-2026.

USPTO Granted Patents = 247 

% Patents Active = 88.7

 

Average Co-Inventor Count = 2.2

ph-index = 14

Forward Citations = 945(Granted Patents)

Forward Citations (Not Self Cited) = 612(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Chiyoda, JP (1988)
  • Chiyoda-ku, JP (1999)
  • Meguro-ku, JP (2010 - 2012)
  • Koto-ku, JP (2014)
  • Chuo-ku, JP (2011 - 2015)
  • Tokyo, JP (1991 - 2023)

Company Filing History:


Years Active: 1988-2026

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Areas of Expertise:
Semiconductor Device
Surrounding Gate Transistor
Fin-Shaped Layer
Pillar-Shaped Device
Gas Treatment Device
Gaming Machine
Touch Panel
Retainer Material
Shoe Sole
Resin-Coated Metal Sheet
Manufacturing Method
Memory Device
247 patents (USPTO):Explore Patents

Title: Hiroki Nakamura: Innovation in Semiconductor Device Production

Introduction:

In the dynamic world of technology, Hiroki Nakamura has made remarkable contributions to the field of semiconductor device production. Hailing from Tokyo, Japan, Nakamura has accumulated an impressive number of 232 patents, showcasing his expertise and pioneering nature. This article delves into Nakamura's latest patents, career highlights, notable collaborations, and his enduring impact on the industry.

Latest Patents:

Among Nakamura's recent patents, one of note is the "Method for Producing a Semiconductor Device Having a Fin-Shaped Semiconductor Layer." This innovative approach involves the formation of a fin-shaped semiconductor layer on a substrate, deposition of multiple insulating films, and subsequent etching to produce various semiconductor layers and gate structures. This method demonstrates Nakamura's proficiency in advanced fabrication techniques and planarization processes.

Another notable patent is Nakamura's "Method for Producing a Semiconductor Device," which employs the use of a gate-last process and self-alignment techniques to create a semiconductor-on-insulator structure. By forming fin-shaped and pillar-shaped semiconductor layers, along with gate electrodes and gate lines, this method enhances the performance and miniaturization of Semiconductor Gate Transistors (SGTs).

Career Highlights:

Nakamura's professional journey has been marked by impactful contributions to prominent organizations. He notably worked at Unisantis Electronics Singapore Pte. Ltd., showcasing his expertise across international boundaries. Additionally, Nakamura made a significant impact during his tenure at Universal Entertainment Corporation, where he further honed his skills in semiconductor device production.

Collaborations:

Throughout his career, Nakamura has collaborated with industry experts, amplifying the reach and impact of his work. Noteworthy among his coworkers are Fujio Masuoka and Nozomu Harada. Collaborations with these esteemed individuals have led to groundbreaking advancements in semiconductor technology, contributing to the collective progress of the industry.

Conclusion:

Hiroki Nakamura has proven himself as a pioneering force in the realm of semiconductor device production. With a vast number of patents to his name and a repertoire of innovative methodologies, Nakamura's contributions have advanced the field's boundaries. As his patents indicate, his expertise lies in novel fabrication techniques encompassing fin-shaped semiconductor layers, gate structures, and self-alignment processes. Through his collaborations with esteemed colleagues and his work in renowned organizations, Nakamura has left an indelible mark on the world of semiconductor innovation.

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