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For the Inventor, By the Inventor

Plano, TX, United States of America

Guruvayurappan Mathur

USPTO Granted Patents = 16 

Average Co-Inventor Count = 3.3

ph-index = 1

Forward Citations = 17(Granted Patents)


Location History:

  • Plano, TX (US) (2019 - 2024)
  • Allen, TX (US) (2022 - 2024)

Company Filing History:

goldMedal16 out of 29,232 
 
Texas Instruments Corporation
 patents

Years Active: 2019-2025

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16 patents (USPTO):
1. 12218190 - False collectors and guard rings for semiconductor devices (2025-02-04),
2. 12170310 - Integrated circuits including composite dielectric layer (2024-12-17),
3. 12015054 - False collectors and guard rings for semiconductor devices (2024-06-18),
4. 12002846 - Integrated circuits having dielectric layers including an anti-reflective coating (2024-06-04),
5. 11605587 - Methods for etching metal interconnect layers (2023-03-14),
6. 11587864 - Stacked capacitor (2023-02-21),
7. 11521961 - Back ballasted vertical NPN transistor (2022-12-06),
8. 11469315 - Bipolar junction transistor with biased structure between base and emitter regions (2022-10-11),
9. 11387323 - Extended drain MOS with dual well isolation (2022-07-12),
10. 11239230 - IC with larger and smaller width contacts (2022-02-01),
11. 11222841 - Stacked capacitor (2022-01-11),
12. 11171200 - Integrated circuits having dielectric layers including an anti-reflective coating (2021-11-09),
13. 10756187 - Extended drain MOS with dual well isolation (2020-08-25),
14. 10700055 - Back ballasted vertical NPN transistor (2020-06-30),
15. 10665663 - IC with top side capacitor having lateral regions with thinned capacitor dielectric (2020-05-26),

Title: Innovations of Guruvayurappan Mathur

Introduction

Guruvayurappan Mathur is a prominent inventor based in Plano, TX (US). He has made significant contributions to the field of semiconductor technology, holding a total of 16 patents. His work focuses on enhancing the performance and efficiency of integrated circuits.

Latest Patents

Among his latest patents, Guruvayurappan Mathur has developed methods for creating false collectors and guard rings for semiconductor devices. This method involves forming first and second false collector regions of a first conductivity type adjacent to a surface of an epitaxial layer of semiconductor material. The first false collector region is strategically located on one side of a base region, which is formed within the epitaxial layer and has a second conductivity type. The second false collector region is positioned on the opposite side of the base region, contributing to the functionality of a parasitic bipolar junction in an active semiconductor device. Additionally, he has patented integrated circuits that include a composite dielectric layer, which consists of multiple sublayers with varying chemical compositions, enhancing the overall performance of the integrated circuit.

Career Highlights

Guruvayurappan Mathur is currently employed at Texas Instruments Corporation, a leading company in the semiconductor industry. His innovative work has positioned him as a key figure in the development of advanced semiconductor technologies.

Collaborations

Throughout his career, Guruvayurappan has collaborated with talented individuals such as Poornika Fernandes and Bhaskar Srinivasan. These collaborations have further enriched his contributions to the field.

Conclusion

Guruvayurappan Mathur's innovative patents and contributions to semiconductor technology highlight his expertise and dedication to advancing the industry. His work continues to influence the development of efficient and effective integrated circuits.

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