Tokyo, Japan

Fujio Masuoka

This inventor holds 377 USPTO granted patents and 15 published patent applications and 15 EPO patents, primarily in Pillar-Shaped Semiconductor (CPC class H01L29-7827). Top assignees: Unisantis Electronics Singapore Pte. Ltd., Kabushiki Kaisha Toshiba, Tokyo Shibaura Denki Kabushiki Kaisha. Active years: 1978-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Fujio Masuoka. Retrieved from https://idiyas.com/inventor/fujio-masuoka

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 377 

% Patents Active = 94.4

 

Average Co-Inventor Count = 2.2

ph-index = 28

Forward Citations = 3,810(Granted Patents)

Forward Citations (Not Self Cited) = 3,169(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Yokohama, JA (1978)
  • Kanagawa, JP (1994)
  • Yokohama, JP (1978 - 2001)
  • Kanagawa-ken, JP (2001 - 2004)
  • Chuo-ku, JP (2011 - 2015)
  • Toyko, JP (2017)
  • Tokyo, JP (1993 - 2024)

Company Filing History:


Years Active: 1978-2024

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Areas of Expertise:
Pillar-Shaped Device
Manufacturing Method
Surrounding Gate Transistor
Three-Dimensional Device
Semiconductor Layer
Connection Material Layer
Wiring Conductor Layer
Fin-Shaped Layer
SGT Technology
Impurity Region
Semiconductor Memory Device
Transistor Design
377 patents (USPTO):Explore Patents

Title: Fujio Masuoka: Innovations & Patents Extraordinaire

Introduction:

Fujio Masuoka, a renowned inventor hailing from Tokyo, Japan, has left an indelible mark in the field of semiconductor technology. With an impressive 371 patents to his name, Masuoka's contributions have laid the foundation for numerous advancements in the industry. This article aims to shed light on a few of his latest patents, highlight key points in his career, explore collaborative efforts, and recognize his invaluable contributions.

Latest Patents:

Among his recent patents, one notable invention is the "Method for Manufacturing Pillar-Shaped Semiconductor Device." This innovation involves the formation of band-shaped silicon (Si) pillars, SiGe layers, and Si layers, resulting in a compact and efficient semiconductor structure.

Another groundbreaking invention is the "Semiconductor Device Having Semiconductor Pillar with First and Second Impurity Regions." This patent describes a semiconductor device comprising a Si pillar, where specific layers and regions are formed to enhance its performance and functionality.

Career Highlights:

Masuoka's expertise and inventiveness have led him to work with esteemed companies such as Unisantis Electronics Singapore Pte. Ltd., known for its cutting-edge semiconductor technologies. Additionally, Masuoka has contributed significantly during his tenure with Kabushiki Kaisha Toshiba, a renowned Japanese multinational conglomerate.

Collaborations:

Throughout his career, Masuoka has collaborated with numerous talented individuals in the field. Notably, he has worked closely with Hiroki Nakamura and Nozomu Harada, two like-minded inventors who have made significant contributions to the field of semiconductor technology.

Conclusion:

Fujio Masuoka has undeniably set new benchmarks in the arena of semiconductor technology. Through his extensive patent portfolio and collaborations with brilliant minds in the field, his contributions continue to shape the industry's landscape. With his inventive spirit and dedication to innovation, Masuoka has undoubtedly earned his place as one of the foremost inventors in the area of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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