The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2023
Filed:
Nov. 24, 2020
Applicant:
Unisantis Electronics Singapore Pte. Ltd., Singapore, SG;
Inventors:
Assignee:
UNISANTIS ELECTRONICS SINGAPORE PTE. LTD., Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 29/0847 (2013.01); H01L 29/66666 (2013.01); H01L 29/7848 (2013.01); H01L 21/02238 (2013.01); H01L 21/02255 (2013.01); H01L 29/42376 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01);
Abstract
A SiOlayer is disposed in the bottom portion of a Si pillar and on an i-layer substrate. A gate HfOlayeris disposed so as to surround the side surface of the Si pillar, and a gate TiN layer is disposed so as to surround the HfOlayer. Players are disposed that contain an acceptor impurity at a high concentration, serve as a source and a drain, and are simultaneously or separately formed by a selective epitaxial crystal growth method on the exposed side surface of the bottom portion of and on the top portion of the Si pillar. Thus, an SGT is formed on the i-layer substrate.