Chien-Chih Chou

This inventor holds 77 USPTO granted patents and 1 published patent application, primarily in Semiconductor Technology (CPC class H01L). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2002-2026.

USPTO Granted Patents = 77 (Patent Applications = 1)

% Patents Active = 96.1

Average Co-Inventor Count = 4.5

ph-index = 7

Forward Citations = 140(Granted Patents)

Forward Citations (Not Self Cited) = 116(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Chu-Pei, TW (2002)
Jhubei, TW (2006)
Jubei, TW (2007 - 2010)
Zhubei, TW (2010 - 2012)
Zhubei City, TW (2013)
New Taipei, TW (2014 - 2024)

Company Filing History:

77 out of 42,810

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2002-2026

Loading Chart...

Areas of Expertise:

High-Voltage Devices

Transistor Structure

Gate Dielectric

Semiconductor Integration

Epitaxial Design

Drain Leakage Reduction

HKMG Technology

Recessed Gate

Dummy Structures

Capacitor Design

LDMOS Transistors

FUSI Device Formation

77 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12563812 - Composite gate dielectric for high-voltage device (2026-02-24),

2. 12557335 - Transistor structure (2026-02-17),

3. 12439679 - FUSI gated device formation (2025-10-07),

4. 12426296 - High-voltage semiconductor devices and methods of formation (2025-09-23),

5. 12396252 - Semiconductor structure and method for forming the same (2025-08-19),

6. 12369377 - Semiconductor structure and forming method thereof (2025-07-22),

7. 12363998 - Recessed gate for an MV device (2025-07-15),

8. 12356658 - Semiconductor structure and method of forming the same (2025-07-08),

9. 12349454 - Checkerboard dummy design for epitaxial open ratio (2025-07-01),

10. 12261218 - Semiconductor structure and method of forming the same (2025-03-25),

11. 12255207 - Boundary design for high-voltage integration on HKMG technology (2025-03-18),

12. 12211926 - Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices (2025-01-28),

13. 12191365 - Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device (2025-01-07),

14. 12176407 - Method of forming a transistor device with a gate structure having a pair of recess regions and a resistive protection layer within (2024-12-24),

15. 12159870 - Semiconductor structure and forming method thereof (2024-12-03),

Title: The Innovative Journey of Chien-Chih Chou

Introduction: Chien-Chih Chou is a renowned inventor hailing from New Taipei, Taiwan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Chien-Chih Chou holds several patents in the areas of electronics, telecommunications, and renewable energy, showcasing his diverse range of expertise and innovative spirit.

Career Highlights: With a career spanning over two decades, Chien-Chih Chou has worked with leading tech companies, research institutions, and universities, playing a pivotal role in developing cutting-edge technologies that have revolutionized the industry.

Collaborations: Throughout his career, Chien-Chih Chou has collaborated with top inventors, patent attorneys, and companies worldwide, fostering a culture of innovation and knowledge sharing that has led to numerous successful projects and inventions.

Conclusion: Chien-Chih Chou's passion for innovation, coupled with his relentless drive to push the boundaries of technology, has solidified his reputation as a visionary inventor whose work continues to inspire future generations in the ever-evolving world of technology.